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Searched refs:VOP_32x32_WB (Results 1 – 25 of 34) sorted by relevance

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/utopia/UTPA2-700.0.x/modules/mvop/hal/k7u/mvop/
H A DhalMVOP.c1043 HAL_WriteRegBit(VOP_REG_DUMMY, 0, VOP_32x32_WB); in HAL_MVOP_SetInputMode()
1602 HAL_WriteRegBit(VOP_REG_DUMMY, 1, VOP_32x32_WB); //32x32 from wb in HAL_MVOP_SetH264HardwireMode()
3253 HAL_WriteRegBit(VOP_REG_DUMMY, 1, VOP_32x32_WB); //32x32 from wb in HAL_MVOP_ResetReg()
3359 HAL_WriteRegBit(SUB_REG(VOP_REG_DUMMY), 1, VOP_32x32_WB); //32x32 from wb in HAL_MVOP_ResetReg()
4553 HAL_WriteRegBit(SUB_REG(VOP_REG_DUMMY), 0, VOP_32x32_WB); in HAL_MVOP_SubSetInputMode()
H A DregMVOP.h350 #define VOP_32x32_WB (BIT6) //32x32 from vdec: Reg_evd_en = 0 + reg_diu_sel = 1 macro
/utopia/UTPA2-700.0.x/modules/mvop/hal/mustang/mvop/
H A DregMVOP.h326 #define VOP_32x32_WB (BIT6) //32x32 from vdec: Reg_evd_en = 0 + reg_diu_sel = 1 macro
/utopia/UTPA2-700.0.x/modules/mvop/hal/macan/mvop/
H A DregMVOP.h329 #define VOP_32x32_WB (BIT6) //32x32 from vdec: Reg_evd_en = 0 + reg_diu_sel = 1 macro
H A DhalMVOP.c1570 HAL_WriteRegBit(VOP_REG_DUMMY, 1, VOP_32x32_WB); //32x32 from wb in HAL_MVOP_SetH264HardwireMode()
3087 HAL_WriteRegBit(VOP_REG_DUMMY, 0, VOP_32x32_WB); in HAL_MVOP_ResetReg()
3187 HAL_WriteRegBit(SUB_REG(VOP_REG_DUMMY), 0, VOP_32x32_WB); in HAL_MVOP_ResetReg()
4713 HAL_WriteRegBit(SUB_REG(VOP_REG_DUMMY), 1, VOP_32x32_WB); //32x32 from wb in HAL_MVOP_SubSetH264HardwireMode()
/utopia/UTPA2-700.0.x/modules/mvop/hal/messi/mvop/
H A DregMVOP.h326 #define VOP_32x32_WB (BIT6) //32x32 from vdec: Reg_evd_en = 0 + reg_diu_sel = 1 macro
/utopia/UTPA2-700.0.x/modules/mvop/hal/manhattan/mvop/
H A DregMVOP.h325 #define VOP_32x32_WB (BIT6) //32x32 from vdec: Reg_evd_en = 0 + reg_diu_sel = 1 macro
H A DhalMVOP.c1508 HAL_WriteRegBit(VOP_REG_DUMMY, 1, VOP_32x32_WB); //32x32 from wb in HAL_MVOP_SetH264HardwireMode()
2980 HAL_WriteRegBit(VOP_REG_DUMMY, 0, VOP_32x32_WB); in HAL_MVOP_ResetReg()
3073 HAL_WriteRegBit(SUB_REG(VOP_REG_DUMMY), 0, VOP_32x32_WB); in HAL_MVOP_ResetReg()
4444 HAL_WriteRegBit(SUB_REG(VOP_REG_DUMMY), 1, VOP_32x32_WB); //32x32 from wb in HAL_MVOP_SubSetH264HardwireMode()
/utopia/UTPA2-700.0.x/modules/mvop/hal/M7821/mvop/
H A DregMVOP.h332 #define VOP_32x32_WB (BIT6) //32x32 from vdec: Reg_evd_en = 0 + reg_diu_sel = 1 macro
H A DhalMVOP.c1597 HAL_WriteRegBit(VOP_REG_DUMMY, 1, VOP_32x32_WB); //32x32 from wb in HAL_MVOP_SetH264HardwireMode()
3105 HAL_WriteRegBit(VOP_REG_DUMMY, 0, VOP_32x32_WB); in HAL_MVOP_ResetReg()
3212 HAL_WriteRegBit(SUB_REG(VOP_REG_DUMMY), 0, VOP_32x32_WB); in HAL_MVOP_ResetReg()
4857 HAL_WriteRegBit(SUB_REG(VOP_REG_DUMMY), 1, VOP_32x32_WB); //32x32 from wb in HAL_MVOP_SubSetH264HardwireMode()
/utopia/UTPA2-700.0.x/modules/mvop/hal/mainz/mvop/
H A DregMVOP.h326 #define VOP_32x32_WB (BIT6) //32x32 from vdec: Reg_evd_en = 0 + reg_diu_sel = 1 macro
/utopia/UTPA2-700.0.x/modules/mvop/hal/mooney/mvop/
H A DregMVOP.h334 #define VOP_32x32_WB (BIT6) //32x32 from vdec: Reg_evd_en = 0 + reg_diu_sel = 1 macro
H A DhalMVOP.c1532 HAL_WriteRegBit(VOP_REG_DUMMY, 1, VOP_32x32_WB); //32x32 from wb in HAL_MVOP_SetH264HardwireMode()
2979 HAL_WriteRegBit(VOP_REG_DUMMY, 0, VOP_32x32_WB); in HAL_MVOP_ResetReg()
3082 HAL_WriteRegBit(SUB_REG(VOP_REG_DUMMY), 0, VOP_32x32_WB); in HAL_MVOP_ResetReg()
4565 HAL_WriteRegBit(SUB_REG(VOP_REG_DUMMY), 1, VOP_32x32_WB); //32x32 from wb in HAL_MVOP_SubSetH264HardwireMode()
/utopia/UTPA2-700.0.x/modules/mvop/hal/maserati/mvop/
H A DregMVOP.h333 #define VOP_32x32_WB (BIT6) //32x32 from vdec: Reg_evd_en = 0 + reg_diu_sel = 1 macro
H A DhalMVOP.c1619 HAL_WriteRegBit(VOP_REG_DUMMY, 1, VOP_32x32_WB); //32x32 from wb in HAL_MVOP_SetH264HardwireMode()
3128 HAL_WriteRegBit(VOP_REG_DUMMY, 0, VOP_32x32_WB); in HAL_MVOP_ResetReg()
3239 HAL_WriteRegBit(SUB_REG(VOP_REG_DUMMY), 0, VOP_32x32_WB); in HAL_MVOP_ResetReg()
4935 HAL_WriteRegBit(SUB_REG(VOP_REG_DUMMY), 1, VOP_32x32_WB); //32x32 from wb in HAL_MVOP_SubSetH264HardwireMode()
/utopia/UTPA2-700.0.x/modules/mvop/hal/M7621/mvop/
H A DregMVOP.h335 #define VOP_32x32_WB (BIT6) //32x32 from vdec: Reg_evd_en = 0 + reg_diu_sel = 1 macro
H A DhalMVOP.c1626 HAL_WriteRegBit(VOP_REG_DUMMY, 1, VOP_32x32_WB); //32x32 from wb in HAL_MVOP_SetH264HardwireMode()
3137 HAL_WriteRegBit(VOP_REG_DUMMY, 0, VOP_32x32_WB); in HAL_MVOP_ResetReg()
3251 HAL_WriteRegBit(SUB_REG(VOP_REG_DUMMY), 0, VOP_32x32_WB); in HAL_MVOP_ResetReg()
4901 HAL_WriteRegBit(SUB_REG(VOP_REG_DUMMY), 1, VOP_32x32_WB); //32x32 from wb in HAL_MVOP_SubSetH264HardwireMode()
/utopia/UTPA2-700.0.x/modules/mvop/hal/M5621/mvop/
H A DregMVOP.h329 #define VOP_32x32_WB (BIT6) //32x32 from vdec: Reg_evd_en = 0 + reg_diu_sel = 1 macro
/utopia/UTPA2-700.0.x/modules/mvop/hal/kastor/mvop/
H A DregMVOP.h341 #define VOP_32x32_WB (BIT6) //32x32 from vdec: Reg_evd_en = 0 + reg_diu_sel = 1 macro
/utopia/UTPA2-700.0.x/modules/mvop/hal/curry/mvop/
H A DregMVOP.h338 #define VOP_32x32_WB (BIT6) //32x32 from vdec: Reg_evd_en = 0 + reg_diu_sel = 1 macro
/utopia/UTPA2-700.0.x/modules/mvop/hal/kano/mvop/
H A DregMVOP.h339 #define VOP_32x32_WB (BIT6) //32x32 from vdec: Reg_evd_en = 0 + reg_diu_sel = 1 macro
/utopia/UTPA2-700.0.x/modules/mvop/hal/k6lite/mvop/
H A DregMVOP.h344 #define VOP_32x32_WB (BIT6) //32x32 from vdec: Reg_evd_en = 0 + reg_diu_sel = 1 macro
/utopia/UTPA2-700.0.x/modules/mvop/hal/maxim/mvop/
H A DregMVOP.h335 #define VOP_32x32_WB (BIT6) //32x32 from vdec: Reg_evd_en = 0 + reg_diu_sel = 1 macro
/utopia/UTPA2-700.0.x/modules/mvop/hal/k6/mvop/
H A DregMVOP.h344 #define VOP_32x32_WB (BIT6) //32x32 from vdec: Reg_evd_en = 0 + reg_diu_sel = 1 macro
H A DhalMVOP.c1124 HAL_WriteRegBit(VOP_REG_DUMMY, 0, VOP_32x32_WB); in HAL_MVOP_SetInputMode()
1658 HAL_WriteRegBit(VOP_REG_DUMMY, 1, VOP_32x32_WB); //32x32 from wb in HAL_MVOP_SetH264HardwireMode()
4610 HAL_WriteRegBit(SUB_REG(VOP_REG_DUMMY), 0, VOP_32x32_WB); in HAL_MVOP_SubSetInputMode()
5053 HAL_WriteRegBit(SUB_REG(VOP_REG_DUMMY), 1, VOP_32x32_WB); //32x32 from wb in HAL_MVOP_SubSetH264HardwireMode()

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