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Searched refs:VDR2_D_ACCESS_RANGE0_CFG_LOCK_RD_LAT_CLR (Results 1 – 6 of 6) sorted by relevance

/utopia/UTPA2-700.0.x/modules/vdec_v3/hal/k6/vpu_v3/
H A DregVPU_EX.h501 …#define VDR2_D_ACCESS_RANGE0_CFG_LOCK_RD_LAT_CLR BIT(13) // Bypass Address Limi… macro
H A DhalVPU_EX.c1158 …Mask(REG_VDR2_D_ACCESS_RANGE0_CFG, VDR2_D_ACCESS_RANGE0_CFG_LOCK_RD_LAT_CLR, VDR2_D_ACCESS_RANGE0_… in _VPU_EX_InitAddressLimiter()
/utopia/UTPA2-700.0.x/modules/vdec_v3/hal/curry/vpu_v3/
H A DregVPU_EX.h501 …#define VDR2_D_ACCESS_RANGE0_CFG_LOCK_RD_LAT_CLR BIT(13) // Bypass Address Limi… macro
H A DhalVPU_EX.c1154 …Mask(REG_VDR2_D_ACCESS_RANGE0_CFG, VDR2_D_ACCESS_RANGE0_CFG_LOCK_RD_LAT_CLR, VDR2_D_ACCESS_RANGE0_… in _VPU_EX_InitAddressLimiter()
/utopia/UTPA2-700.0.x/modules/vdec_v3/hal/k6lite/vpu_v3/
H A DregVPU_EX.h501 …#define VDR2_D_ACCESS_RANGE0_CFG_LOCK_RD_LAT_CLR BIT(13) // Bypass Address Limi… macro
H A DhalVPU_EX.c1157 …Mask(REG_VDR2_D_ACCESS_RANGE0_CFG, VDR2_D_ACCESS_RANGE0_CFG_LOCK_RD_LAT_CLR, VDR2_D_ACCESS_RANGE0_… in _VPU_EX_InitAddressLimiter()