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Searched refs:Reg_fiq_config16 (Results 1 – 20 of 20) sorted by relevance

/utopia/UTPA2-700.0.x/modules/dmx/hal/macan/fq/
H A DhalFQ.c259 …FQ16_W(&(_REGFIQ[u32FQEng].Reg_fiq_config16), _SET_(_HAL_REG16_R(&(_REGFIQ[u32FQEng].Reg_fiq_conf… in HAL_FQ_INT_Enable()
264 …FQ16_W(&(_REGFIQ[u32FQEng].Reg_fiq_config16), _CLR_(_HAL_REG16_R(&(_REGFIQ[u32FQEng].Reg_fiq_confi… in HAL_FQ_INT_Disable()
269 return _HAL_REG16_R(&(_REGFIQ[u32FQEng].Reg_fiq_config16)) & FIQ_CFG16_INT_STATUS_MASK; in HAL_FQ_INT_GetHW()
274 …FQ16_W(&(_REGFIQ[u32FQEng].Reg_fiq_config16), _CLR_(_HAL_REG16_R(&(_REGFIQ[u32FQEng].Reg_fiq_confi… in HAL_FQ_INT_ClrHW()
H A DregFQ.h171 REG16_FQ Reg_fiq_config16; //0x10 member
/utopia/UTPA2-700.0.x/modules/dmx/hal/manhattan/fq/
H A DhalFQ.c263 …FQ16_W(&(_REGFIQ[u32FQEng].Reg_fiq_config16), _SET_(_HAL_REG16_R(&(_REGFIQ[u32FQEng].Reg_fiq_conf… in HAL_FQ_INT_Enable()
268 …FQ16_W(&(_REGFIQ[u32FQEng].Reg_fiq_config16), _CLR_(_HAL_REG16_R(&(_REGFIQ[u32FQEng].Reg_fiq_confi… in HAL_FQ_INT_Disable()
273 return _HAL_REG16_R(&(_REGFIQ[u32FQEng].Reg_fiq_config16)) & FIQ_CFG16_INT_STATUS_MASK; in HAL_FQ_INT_GetHW()
278 …FQ16_W(&(_REGFIQ[u32FQEng].Reg_fiq_config16), _CLR_(_HAL_REG16_R(&(_REGFIQ[u32FQEng].Reg_fiq_confi… in HAL_FQ_INT_ClrHW()
H A DregFQ.h171 REG16_FQ Reg_fiq_config16; //0x10 member
/utopia/UTPA2-700.0.x/modules/dmx/hal/kano/fq/
H A DhalFQ.c252 …FQ16_W(&(_REGFIQ[u32FQEng].Reg_fiq_config16), _SET_(_HAL_REG16_R(&(_REGFIQ[u32FQEng].Reg_fiq_conf… in HAL_FQ_INT_Enable()
257 …FQ16_W(&(_REGFIQ[u32FQEng].Reg_fiq_config16), _CLR_(_HAL_REG16_R(&(_REGFIQ[u32FQEng].Reg_fiq_confi… in HAL_FQ_INT_Disable()
262 return _HAL_REG16_R(&(_REGFIQ[u32FQEng].Reg_fiq_config16)) & FIQ_CFG16_INT_STATUS_MASK; in HAL_FQ_INT_GetHW()
267 …FQ16_W(&(_REGFIQ[u32FQEng].Reg_fiq_config16), _CLR_(_HAL_REG16_R(&(_REGFIQ[u32FQEng].Reg_fiq_confi… in HAL_FQ_INT_ClrHW()
H A DregFQ.h180 REG16_FQ Reg_fiq_config16; //0x10 member
/utopia/UTPA2-700.0.x/modules/dmx/hal/k6lite/fq/
H A DhalFQ.c251 …FQ16_W(&(_REGFIQ[u32FQEng].Reg_fiq_config16), _SET_(_HAL_REG16_R(&(_REGFIQ[u32FQEng].Reg_fiq_conf… in HAL_FQ_INT_Enable()
256 …FQ16_W(&(_REGFIQ[u32FQEng].Reg_fiq_config16), _CLR_(_HAL_REG16_R(&(_REGFIQ[u32FQEng].Reg_fiq_confi… in HAL_FQ_INT_Disable()
261 return _HAL_REG16_R(&(_REGFIQ[u32FQEng].Reg_fiq_config16)) & FIQ_CFG16_INT_STATUS_MASK; in HAL_FQ_INT_GetHW()
266 …FQ16_W(&(_REGFIQ[u32FQEng].Reg_fiq_config16), _CLR_(_HAL_REG16_R(&(_REGFIQ[u32FQEng].Reg_fiq_confi… in HAL_FQ_INT_ClrHW()
H A DregFQ.h190 REG16_FQ Reg_fiq_config16; //0x10 member
/utopia/UTPA2-700.0.x/modules/dmx/hal/k6/fq/
H A DhalFQ.c251 …FQ16_W(&(_REGFIQ[u32FQEng].Reg_fiq_config16), _SET_(_HAL_REG16_R(&(_REGFIQ[u32FQEng].Reg_fiq_conf… in HAL_FQ_INT_Enable()
256 …FQ16_W(&(_REGFIQ[u32FQEng].Reg_fiq_config16), _CLR_(_HAL_REG16_R(&(_REGFIQ[u32FQEng].Reg_fiq_confi… in HAL_FQ_INT_Disable()
261 return _HAL_REG16_R(&(_REGFIQ[u32FQEng].Reg_fiq_config16)) & FIQ_CFG16_INT_STATUS_MASK; in HAL_FQ_INT_GetHW()
266 …FQ16_W(&(_REGFIQ[u32FQEng].Reg_fiq_config16), _CLR_(_HAL_REG16_R(&(_REGFIQ[u32FQEng].Reg_fiq_confi… in HAL_FQ_INT_ClrHW()
H A DregFQ.h188 REG16_FQ Reg_fiq_config16; //0x10 member
/utopia/UTPA2-700.0.x/modules/dmx/hal/curry/fq/
H A DhalFQ.c274 …FQ16_W(&(_REGFIQ[u32FQEng].Reg_fiq_config16), _SET_(_HAL_REG16_R(&(_REGFIQ[u32FQEng].Reg_fiq_conf… in HAL_FQ_INT_Enable()
279 …FQ16_W(&(_REGFIQ[u32FQEng].Reg_fiq_config16), _CLR_(_HAL_REG16_R(&(_REGFIQ[u32FQEng].Reg_fiq_confi… in HAL_FQ_INT_Disable()
284 return _HAL_REG16_R(&(_REGFIQ[u32FQEng].Reg_fiq_config16)) & FIQ_CFG16_INT_STATUS_MASK; in HAL_FQ_INT_GetHW()
289 …FQ16_W(&(_REGFIQ[u32FQEng].Reg_fiq_config16), _CLR_(_HAL_REG16_R(&(_REGFIQ[u32FQEng].Reg_fiq_confi… in HAL_FQ_INT_ClrHW()
H A DregFQ.h180 REG16_FQ Reg_fiq_config16; //0x10 member
/utopia/UTPA2-700.0.x/modules/dmx/hal/M7621/fq/
H A DhalFQ.c317 …FQ16_W(&(_REGFIQ[u32FQEng].Reg_fiq_config16), _SET_(_HAL_REG16_R(&(_REGFIQ[u32FQEng].Reg_fiq_conf…
322 …FQ16_W(&(_REGFIQ[u32FQEng].Reg_fiq_config16), _CLR_(_HAL_REG16_R(&(_REGFIQ[u32FQEng].Reg_fiq_confi…
327 return _HAL_REG16_R(&(_REGFIQ[u32FQEng].Reg_fiq_config16)) & FIQ_CFG16_INT_STATUS_MASK;
332 …FQ16_W(&(_REGFIQ[u32FQEng].Reg_fiq_config16), _CLR_(_HAL_REG16_R(&(_REGFIQ[u32FQEng].Reg_fiq_confi…
H A DregFQ.h183 REG16_FQ Reg_fiq_config16; //0x50 member
/utopia/UTPA2-700.0.x/modules/dmx/hal/maxim/fq/
H A DhalFQ.c317 …FQ16_W(&(_REGFIQ[u32FQEng].Reg_fiq_config16), _SET_(_HAL_REG16_R(&(_REGFIQ[u32FQEng].Reg_fiq_conf…
322 …FQ16_W(&(_REGFIQ[u32FQEng].Reg_fiq_config16), _CLR_(_HAL_REG16_R(&(_REGFIQ[u32FQEng].Reg_fiq_confi…
327 return _HAL_REG16_R(&(_REGFIQ[u32FQEng].Reg_fiq_config16)) & FIQ_CFG16_INT_STATUS_MASK;
332 …FQ16_W(&(_REGFIQ[u32FQEng].Reg_fiq_config16), _CLR_(_HAL_REG16_R(&(_REGFIQ[u32FQEng].Reg_fiq_confi…
H A DregFQ.h183 REG16_FQ Reg_fiq_config16; //0x50 member
/utopia/UTPA2-700.0.x/modules/dmx/hal/M7821/fq/
H A DhalFQ.c317 …FQ16_W(&(_REGFIQ[u32FQEng].Reg_fiq_config16), _SET_(_HAL_REG16_R(&(_REGFIQ[u32FQEng].Reg_fiq_conf…
322 …FQ16_W(&(_REGFIQ[u32FQEng].Reg_fiq_config16), _CLR_(_HAL_REG16_R(&(_REGFIQ[u32FQEng].Reg_fiq_confi…
327 return _HAL_REG16_R(&(_REGFIQ[u32FQEng].Reg_fiq_config16)) & FIQ_CFG16_INT_STATUS_MASK;
332 …FQ16_W(&(_REGFIQ[u32FQEng].Reg_fiq_config16), _CLR_(_HAL_REG16_R(&(_REGFIQ[u32FQEng].Reg_fiq_confi…
H A DregFQ.h183 REG16_FQ Reg_fiq_config16; //0x50 member
/utopia/UTPA2-700.0.x/modules/dmx/hal/maserati/fq/
H A DhalFQ.c317 …FQ16_W(&(_REGFIQ[u32FQEng].Reg_fiq_config16), _SET_(_HAL_REG16_R(&(_REGFIQ[u32FQEng].Reg_fiq_conf…
322 …FQ16_W(&(_REGFIQ[u32FQEng].Reg_fiq_config16), _CLR_(_HAL_REG16_R(&(_REGFIQ[u32FQEng].Reg_fiq_confi…
327 return _HAL_REG16_R(&(_REGFIQ[u32FQEng].Reg_fiq_config16)) & FIQ_CFG16_INT_STATUS_MASK;
332 …FQ16_W(&(_REGFIQ[u32FQEng].Reg_fiq_config16), _CLR_(_HAL_REG16_R(&(_REGFIQ[u32FQEng].Reg_fiq_confi…
H A DregFQ.h183 REG16_FQ Reg_fiq_config16; //0x50 member