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Searched refs:REG_PWM4_NVS (Results 1 – 22 of 22) sorted by relevance

/utopia/UTPA2-700.0.x/modules/pwm/hal/macan/pwm/
H A DregPWM.h300 #define REG_PWM4_NVS (0x34) //bit4 macro
H A DhalPWM.c1181 HAL_PWM_WriteRegBit(REG_PWM4_NVS,BITS(4:4,bNvsPWM),BMASK(4:4)); in HAL_PWM_Nvsync()
/utopia/UTPA2-700.0.x/modules/pwm/hal/messi/pwm/
H A DregPWM.h300 #define REG_PWM4_NVS (0x34) //bit4 macro
H A DhalPWM.c1506 HAL_PWM_WriteRegBit(REG_PWM4_NVS,BITS(4:4,bNvsPWM),BMASK(4:4)); in HAL_PWM_Nvsync()
/utopia/UTPA2-700.0.x/modules/pwm/hal/mooney/pwm/
H A DregPWM.h300 #define REG_PWM4_NVS (0x34) //bit4 macro
H A DhalPWM.c1498 HAL_PWM_WriteRegBit(REG_PWM4_NVS,BITS(4:4,bNvsPWM),BMASK(4:4)); in HAL_PWM_Nvsync()
/utopia/UTPA2-700.0.x/modules/pwm/hal/mainz/pwm/
H A DregPWM.h300 #define REG_PWM4_NVS (0x34) //bit4 macro
H A DhalPWM.c1501 HAL_PWM_WriteRegBit(REG_PWM4_NVS,BITS(4:4,bNvsPWM),BMASK(4:4)); in HAL_PWM_Nvsync()
/utopia/UTPA2-700.0.x/modules/pwm/hal/manhattan/pwm/
H A DregPWM.h300 #define REG_PWM4_NVS (0x34) //bit4 macro
H A DhalPWM.c1498 HAL_PWM_WriteRegBit(REG_PWM4_NVS,BITS(4:4,bNvsPWM),BMASK(4:4)); in HAL_PWM_Nvsync()
/utopia/UTPA2-700.0.x/modules/pwm/hal/maxim/pwm/
H A DregPWM.h309 #define REG_PWM4_NVS (0x34) //bit4 macro
H A DhalPWM.c1498 HAL_PWM_WriteRegBit(REG_PWM4_NVS,BITS(4:4,bNvsPWM),BMASK(4:4)); in HAL_PWM_Nvsync()
/utopia/UTPA2-700.0.x/modules/pwm/hal/mustang/pwm/
H A DregPWM.h292 #define REG_PWM4_NVS (0x34) //bit4 macro
H A DhalPWM.c1187 HAL_PWM_WriteRegBit(REG_PWM4_NVS, BITS(4:4, bNvsPWM), BMASK(4:4)); in HAL_PWM_Nvsync()
/utopia/UTPA2-700.0.x/modules/pwm/hal/M7621/pwm/
H A DregPWM.h309 #define REG_PWM4_NVS (0x34) //bit4 macro
H A DhalPWM.c1498 HAL_PWM_WriteRegBit(REG_PWM4_NVS,BITS(4:4,bNvsPWM),BMASK(4:4)); in HAL_PWM_Nvsync()
/utopia/UTPA2-700.0.x/modules/pwm/hal/M7821/pwm/
H A DregPWM.h309 #define REG_PWM4_NVS (0x34) //bit4 macro
H A DhalPWM.c1499 HAL_PWM_WriteRegBit(REG_PWM4_NVS,BITS(4:4,bNvsPWM),BMASK(4:4)); in HAL_PWM_Nvsync()
/utopia/UTPA2-700.0.x/modules/pwm/hal/maldives/pwm/
H A DregPWM.h288 #define REG_PWM4_NVS (0x34) //bit4 macro
H A DhalPWM.c1182 HAL_PWM_WriteRegBit(REG_PWM4_NVS, BITS(4:4, bNvsPWM), BMASK(4:4)); in HAL_PWM_Nvsync()
/utopia/UTPA2-700.0.x/modules/pwm/hal/maserati/pwm/
H A DregPWM.h309 #define REG_PWM4_NVS (0x34) //bit4 macro
H A DhalPWM.c1499 HAL_PWM_WriteRegBit(REG_PWM4_NVS,BITS(4:4,bNvsPWM),BMASK(4:4)); in HAL_PWM_Nvsync()