xref: /utopia/UTPA2-700.0.x/modules/pwm/hal/maldives/pwm/halPWM.c (revision 53ee8cc121a030b8d368113ac3e966b4705770ef)
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77*53ee8cc1Swenshuai.xi //<MStar Software>
78*53ee8cc1Swenshuai.xi 
79*53ee8cc1Swenshuai.xi #define _HAL_PWM_C
80*53ee8cc1Swenshuai.xi 
81*53ee8cc1Swenshuai.xi ////////////////////////////////////////////////////////////////////////////////
82*53ee8cc1Swenshuai.xi /// @file mhal_PWM.c
83*53ee8cc1Swenshuai.xi /// @author MStar Semiconductor Inc.
84*53ee8cc1Swenshuai.xi /// @brief Pulse Width Modulation driver
85*53ee8cc1Swenshuai.xi ////////////////////////////////////////////////////////////////////////////////
86*53ee8cc1Swenshuai.xi 
87*53ee8cc1Swenshuai.xi ////////////////////////////////////////////////////////////////////////////////
88*53ee8cc1Swenshuai.xi // Header Files
89*53ee8cc1Swenshuai.xi ////////////////////////////////////////////////////////////////////////////////
90*53ee8cc1Swenshuai.xi #include "MsCommon.h"
91*53ee8cc1Swenshuai.xi #include "MsTypes.h"
92*53ee8cc1Swenshuai.xi #include "drvPWM.h"/* this is not good idea, just for temp. */
93*53ee8cc1Swenshuai.xi #include "halPWM.h"
94*53ee8cc1Swenshuai.xi #include "regPWM.h"
95*53ee8cc1Swenshuai.xi 
96*53ee8cc1Swenshuai.xi ////////////////////////////////////////////////////////////////////////////////
97*53ee8cc1Swenshuai.xi // Global variable
98*53ee8cc1Swenshuai.xi ////////////////////////////////////////////////////////////////////////////////
99*53ee8cc1Swenshuai.xi 
100*53ee8cc1Swenshuai.xi static MS_U32 _gMIO_MapBase = 0;
101*53ee8cc1Swenshuai.xi static MS_U32 _gMIO_PM_MapBase = 0;
102*53ee8cc1Swenshuai.xi static MS_U16 _gPWM_Status  = 0;
103*53ee8cc1Swenshuai.xi 
104*53ee8cc1Swenshuai.xi //static MS_BOOL _gPWM_DBen   = 0;
105*53ee8cc1Swenshuai.xi static MS_BOOL _gPWM_VDBen  = 0;
106*53ee8cc1Swenshuai.xi 
107*53ee8cc1Swenshuai.xi static void _HAL_PWM_VDBen_SW(PWM_ChNum index, MS_BOOL bSwitch);
108*53ee8cc1Swenshuai.xi ////////////////////////////////////////////////////////////////////////////////
109*53ee8cc1Swenshuai.xi // Define & data type
110*53ee8cc1Swenshuai.xi ///////////////////////////////////////////////////////////////////////////////
111*53ee8cc1Swenshuai.xi #define WRITE_WORD_MASK(_reg, _val, _mask)      {(*((volatile MS_U16*)(_reg))) = ((*((volatile MS_U16*)(_reg))) & ~(_mask)) | ((MS_U16)(_val) & (_mask)); }
112*53ee8cc1Swenshuai.xi 
113*53ee8cc1Swenshuai.xi #define HAL_PWM_ReadByte(addr)		            READ_BYTE((_gMIO_MapBase + REG_PWM_BASE) + ((addr)<<2))
114*53ee8cc1Swenshuai.xi #define HAL_PWM_Read2Byte(addr)                 READ_WORD((_gMIO_MapBase + REG_PWM_BASE) + ((addr)<<2))
115*53ee8cc1Swenshuai.xi 
116*53ee8cc1Swenshuai.xi #define HAL_PWM_WriteByte(addr, val) 	        WRITE_BYTE((_gMIO_MapBase + REG_PWM_BASE) + ((addr)<<2), (val))
117*53ee8cc1Swenshuai.xi #define HAL_PWM_Write2Byte(addr, val)           WRITE_WORD((_gMIO_MapBase + REG_PWM_BASE) + ((addr)<<2), (val))
118*53ee8cc1Swenshuai.xi #define HAL_PWM_WriteRegBit(addr, val, mask)    WRITE_WORD_MASK((_gMIO_MapBase + REG_PWM_BASE) + ((addr)<<2), (val), (mask))
119*53ee8cc1Swenshuai.xi 
120*53ee8cc1Swenshuai.xi #define HAL_TOP_ReadByte(addr)		            READ_BYTE((_gMIO_MapBase + REG_TOP_BASE) + ((addr)<<2))
121*53ee8cc1Swenshuai.xi #define HAL_TOP_Read2Byte(addr)                 READ_WORD((_gMIO_MapBase + REG_TOP_BASE) + ((addr)<<2))
122*53ee8cc1Swenshuai.xi #define HAL_TOP_WriteRegBit(addr, val, mask)    WRITE_WORD_MASK((_gMIO_MapBase + REG_TOP_BASE) + ((addr)<<2), (val), (mask))
123*53ee8cc1Swenshuai.xi 
124*53ee8cc1Swenshuai.xi #define HAL_PM_WriteByte(addr, val) 	        WRITE_BYTE((_gMIO_PM_MapBase + REG_PM_BASE) + ((addr)<<2), (val))
125*53ee8cc1Swenshuai.xi #define HAL_PM_Write2Byte(addr, val)            WRITE_WORD((_gMIO_PM_MapBase + REG_PM_BASE) + ((addr)<<2), (val))
126*53ee8cc1Swenshuai.xi #define HAL_PM_WriteRegBit(addr, val, mask)     WRITE_WORD_MASK((_gMIO_PM_MapBase + REG_PM_BASE) + ((addr)<<2), (val), (mask))
127*53ee8cc1Swenshuai.xi 
128*53ee8cc1Swenshuai.xi #define HAL_SUBBANK0                            HAL_PWM_WriteByte(0,0)
129*53ee8cc1Swenshuai.xi #define HAL_SUBBANK1                            HAL_PWM_WriteByte(0,1) /* PWM sub-bank */
130*53ee8cc1Swenshuai.xi 
131*53ee8cc1Swenshuai.xi ////////////////////////////////////////////////////////////////////////////////
132*53ee8cc1Swenshuai.xi // Global Function
133*53ee8cc1Swenshuai.xi ////////////////////////////////////////////////////////////////////////////////
HAL_PWM_Write4Byte(MS_U32 u32RegAddr,MS_U32 u32Val)134*53ee8cc1Swenshuai.xi MS_BOOL HAL_PWM_Write4Byte(MS_U32 u32RegAddr, MS_U32 u32Val)
135*53ee8cc1Swenshuai.xi {
136*53ee8cc1Swenshuai.xi     HAL_PWM_Write2Byte(u32RegAddr, u32Val & 0x0000FFFF);
137*53ee8cc1Swenshuai.xi     HAL_PWM_Write2Byte(u32RegAddr+2, u32Val >> 16);
138*53ee8cc1Swenshuai.xi     return TRUE;
139*53ee8cc1Swenshuai.xi }
140*53ee8cc1Swenshuai.xi 
HAL_PWM_WriteNumberByte(MS_U32 u32RegAddr,MS_U32 u32SetValue,MS_U8 u8BitNum)141*53ee8cc1Swenshuai.xi static MS_BOOL HAL_PWM_WriteNumberByte(MS_U32 u32RegAddr, MS_U32 u32SetValue, MS_U8 u8BitNum)
142*53ee8cc1Swenshuai.xi {
143*53ee8cc1Swenshuai.xi     MS_U32 u32Mask=0x0;
144*53ee8cc1Swenshuai.xi     MS_U32 u32Value=0x0;
145*53ee8cc1Swenshuai.xi     MS_U8 i;
146*53ee8cc1Swenshuai.xi 
147*53ee8cc1Swenshuai.xi     for(i = 0; i<u8BitNum; i++)
148*53ee8cc1Swenshuai.xi         u32Mask |= (1<<i);
149*53ee8cc1Swenshuai.xi     if (u8BitNum == 0)
150*53ee8cc1Swenshuai.xi     {
151*53ee8cc1Swenshuai.xi         return TRUE;
152*53ee8cc1Swenshuai.xi     }
153*53ee8cc1Swenshuai.xi     else if (u8BitNum <= 8)
154*53ee8cc1Swenshuai.xi     {
155*53ee8cc1Swenshuai.xi         u32Value = u32SetValue & u32Mask;
156*53ee8cc1Swenshuai.xi         HAL_PWM_WriteByte(u32RegAddr, (MS_U8) u32Value) ;
157*53ee8cc1Swenshuai.xi     }
158*53ee8cc1Swenshuai.xi     else if (u8BitNum <= 16)
159*53ee8cc1Swenshuai.xi     {
160*53ee8cc1Swenshuai.xi         u32Value = u32SetValue & u32Mask;
161*53ee8cc1Swenshuai.xi         HAL_PWM_Write2Byte(u32RegAddr, (MS_U16) u32Value) ;
162*53ee8cc1Swenshuai.xi     }
163*53ee8cc1Swenshuai.xi     else if (u8BitNum <= 32)
164*53ee8cc1Swenshuai.xi     {
165*53ee8cc1Swenshuai.xi         u32Value = u32SetValue & u32Mask;
166*53ee8cc1Swenshuai.xi         HAL_PWM_Write4Byte(u32RegAddr, (MS_U32) u32Value) ;
167*53ee8cc1Swenshuai.xi     }
168*53ee8cc1Swenshuai.xi     else
169*53ee8cc1Swenshuai.xi     {
170*53ee8cc1Swenshuai.xi         return FALSE;
171*53ee8cc1Swenshuai.xi     }
172*53ee8cc1Swenshuai.xi     return TRUE;
173*53ee8cc1Swenshuai.xi }
174*53ee8cc1Swenshuai.xi 
_HAL_PWM_VDBen_SW(PWM_ChNum index,MS_BOOL bSwitch)175*53ee8cc1Swenshuai.xi static void _HAL_PWM_VDBen_SW(PWM_ChNum index, MS_BOOL bSwitch)
176*53ee8cc1Swenshuai.xi {
177*53ee8cc1Swenshuai.xi 	if(_gPWM_VDBen)
178*53ee8cc1Swenshuai.xi 	{
179*53ee8cc1Swenshuai.xi 		//printf("%s(0x%08X, %x)", __FUNCTION__, (int)index, bSwitch);
180*53ee8cc1Swenshuai.xi 		switch(index)
181*53ee8cc1Swenshuai.xi         {
182*53ee8cc1Swenshuai.xi         	case E_PWM_CH0:
183*53ee8cc1Swenshuai.xi             	HAL_PWM_WriteRegBit(REG_PWM0_VDBEN_SW, BITS(14:14, bSwitch), BMASK(14:14));
184*53ee8cc1Swenshuai.xi             	break;
185*53ee8cc1Swenshuai.xi         	case E_PWM_CH1:
186*53ee8cc1Swenshuai.xi 				HAL_PWM_WriteRegBit(REG_PWM1_VDBEN_SW, BITS(14:14, bSwitch), BMASK(14:14));
187*53ee8cc1Swenshuai.xi             	break;
188*53ee8cc1Swenshuai.xi         	case E_PWM_CH2:
189*53ee8cc1Swenshuai.xi 				HAL_PWM_WriteRegBit(REG_PWM2_VDBEN_SW, BITS(14:14, bSwitch), BMASK(14:14));
190*53ee8cc1Swenshuai.xi             	break;
191*53ee8cc1Swenshuai.xi         	case E_PWM_CH3:
192*53ee8cc1Swenshuai.xi 				HAL_PWM_WriteRegBit(REG_PWM3_VDBEN_SW, BITS(14:14, bSwitch), BMASK(14:14));
193*53ee8cc1Swenshuai.xi             	break;
194*53ee8cc1Swenshuai.xi         	case E_PWM_CH4:
195*53ee8cc1Swenshuai.xi 				HAL_PWM_WriteRegBit(REG_PWM4_VDBEN_SW, BITS(14:14, bSwitch), BMASK(14:14));
196*53ee8cc1Swenshuai.xi             	break;
197*53ee8cc1Swenshuai.xi         	case E_PWM_CH5:
198*53ee8cc1Swenshuai.xi 				HAL_PWM_WriteRegBit(REG_PWM5_VDBEN_SW, BITS(14:14, bSwitch), BMASK(14:14));
199*53ee8cc1Swenshuai.xi             	break;
200*53ee8cc1Swenshuai.xi 
201*53ee8cc1Swenshuai.xi         	case E_PWM_CH6:
202*53ee8cc1Swenshuai.xi         	case E_PWM_CH7:
203*53ee8cc1Swenshuai.xi         	case E_PWM_CH8:
204*53ee8cc1Swenshuai.xi         	case E_PWM_CH9:
205*53ee8cc1Swenshuai.xi 			default:
206*53ee8cc1Swenshuai.xi 				printf("[ERROR] No Support PWM%d in Miami Platform\n", (int)index);
207*53ee8cc1Swenshuai.xi             	UNUSED(bSwitch);
208*53ee8cc1Swenshuai.xi             	break;
209*53ee8cc1Swenshuai.xi 		}
210*53ee8cc1Swenshuai.xi 	}
211*53ee8cc1Swenshuai.xi }
212*53ee8cc1Swenshuai.xi 
213*53ee8cc1Swenshuai.xi ////////////////////////////////////////////////////////////////////////////////
214*53ee8cc1Swenshuai.xi /// @brief \b Function   \b Name: HAL_PWM_SetIOMapBase
215*53ee8cc1Swenshuai.xi /// @brief \b Function   \b Description: Set IO Map base
216*53ee8cc1Swenshuai.xi /// @param <IN>          \b None :
217*53ee8cc1Swenshuai.xi /// @param <OUT>       \b None :
218*53ee8cc1Swenshuai.xi /// @param <RET>        \b None :
219*53ee8cc1Swenshuai.xi /// @param <GLOBAL>   \b None :
220*53ee8cc1Swenshuai.xi ////////////////////////////////////////////////////////////////////////////////
HAL_PWM_SetIOMapBase(MS_U32 u32Base,MS_U32 u32Base1)221*53ee8cc1Swenshuai.xi void HAL_PWM_SetIOMapBase(MS_U32 u32Base,MS_U32 u32Base1)
222*53ee8cc1Swenshuai.xi {
223*53ee8cc1Swenshuai.xi     _gMIO_MapBase = u32Base;
224*53ee8cc1Swenshuai.xi     _gMIO_PM_MapBase = u32Base1;
225*53ee8cc1Swenshuai.xi }
226*53ee8cc1Swenshuai.xi 
227*53ee8cc1Swenshuai.xi ////////////////////////////////////////////////////////////////////////////////
228*53ee8cc1Swenshuai.xi /// @brief \b Function   \b Name: HAL_PWM_SetChipTopIOMapBase
229*53ee8cc1Swenshuai.xi /// @brief \b Function   \b Description: Set chip top IO Map base
230*53ee8cc1Swenshuai.xi /// @param <IN>          \b None :
231*53ee8cc1Swenshuai.xi /// @param <OUT>       \b None :
232*53ee8cc1Swenshuai.xi /// @param <RET>        \b None :
233*53ee8cc1Swenshuai.xi /// @param <GLOBAL>   \b None :
234*53ee8cc1Swenshuai.xi ////////////////////////////////////////////////////////////////////////////////
HAL_PWM_SetChipTopIOMapBase(MS_U32 u32Base)235*53ee8cc1Swenshuai.xi void HAL_PWM_SetChipTopIOMapBase(MS_U32 u32Base)
236*53ee8cc1Swenshuai.xi {
237*53ee8cc1Swenshuai.xi 
238*53ee8cc1Swenshuai.xi }
239*53ee8cc1Swenshuai.xi 
240*53ee8cc1Swenshuai.xi ////////////////////////////////////////////////////////////////////////////////
241*53ee8cc1Swenshuai.xi /// @brief \b Function   \b Name: HAL_PWM_GetIOMapBase
242*53ee8cc1Swenshuai.xi /// @brief \b Function   \b Description: Get IO Map base
243*53ee8cc1Swenshuai.xi /// @param <IN>          \b None :
244*53ee8cc1Swenshuai.xi /// @param <OUT>       \b None :
245*53ee8cc1Swenshuai.xi /// @param <RET>        \b None :
246*53ee8cc1Swenshuai.xi /// @param <GLOBAL>   \b None :
247*53ee8cc1Swenshuai.xi ////////////////////////////////////////////////////////////////////////////////
HAL_PWM_GetIOMapBase(void)248*53ee8cc1Swenshuai.xi MS_U32 HAL_PWM_GetIOMapBase(void)
249*53ee8cc1Swenshuai.xi {
250*53ee8cc1Swenshuai.xi     return _gMIO_MapBase;
251*53ee8cc1Swenshuai.xi }
252*53ee8cc1Swenshuai.xi 
253*53ee8cc1Swenshuai.xi ////////////////////////////////////////////////////////////////////////////////
254*53ee8cc1Swenshuai.xi /// @brief \b Function   \b Name: HAL_PWM_Init
255*53ee8cc1Swenshuai.xi /// @brief \b Function   \b Description: Initial PWM
256*53ee8cc1Swenshuai.xi /// @param <IN>          \b None :
257*53ee8cc1Swenshuai.xi /// @param <OUT>       \b None :
258*53ee8cc1Swenshuai.xi /// @param <RET>        \b MS_BOOL :
259*53ee8cc1Swenshuai.xi /// @param <GLOBAL>   \b None :
260*53ee8cc1Swenshuai.xi ////////////////////////////////////////////////////////////////////////////////
HAL_PWM_Init(void)261*53ee8cc1Swenshuai.xi MS_BOOL HAL_PWM_Init(void)
262*53ee8cc1Swenshuai.xi {
263*53ee8cc1Swenshuai.xi 	_gPWM_Status = HAL_TOP_Read2Byte(REG_PWM_MODE);
264*53ee8cc1Swenshuai.xi 
265*53ee8cc1Swenshuai.xi 	if(_gPWM_Status & PAD_PWM0_OUT)
266*53ee8cc1Swenshuai.xi 	{
267*53ee8cc1Swenshuai.xi 		printf("Init PWM0\n");
268*53ee8cc1Swenshuai.xi 	}
269*53ee8cc1Swenshuai.xi 	if(_gPWM_Status & PAD_PWM1_OUT)
270*53ee8cc1Swenshuai.xi 	{
271*53ee8cc1Swenshuai.xi 		printf("Init PWM1\n");
272*53ee8cc1Swenshuai.xi 	}
273*53ee8cc1Swenshuai.xi 	if(_gPWM_Status & PAD_PWM2_OUT)
274*53ee8cc1Swenshuai.xi 	{
275*53ee8cc1Swenshuai.xi 		printf("Init PWM2\n");
276*53ee8cc1Swenshuai.xi 	}
277*53ee8cc1Swenshuai.xi 	if(_gPWM_Status & PAD_PWM3_OUT)
278*53ee8cc1Swenshuai.xi 	{
279*53ee8cc1Swenshuai.xi 		printf("Init PWM3\n");
280*53ee8cc1Swenshuai.xi 	}
281*53ee8cc1Swenshuai.xi 	if(_gPWM_Status & PAD_PWM4_OUT)
282*53ee8cc1Swenshuai.xi 	{
283*53ee8cc1Swenshuai.xi 		printf("Init PWM4\n");
284*53ee8cc1Swenshuai.xi 	}
285*53ee8cc1Swenshuai.xi 
286*53ee8cc1Swenshuai.xi 	_gPWM_Status = HAL_TOP_Read2Byte(REG_PWM5_MODE);
287*53ee8cc1Swenshuai.xi 	if(_gPWM_Status & PAD_PWM5_OUT)
288*53ee8cc1Swenshuai.xi 	{
289*53ee8cc1Swenshuai.xi 		printf("Init PWM5\n");
290*53ee8cc1Swenshuai.xi 	}
291*53ee8cc1Swenshuai.xi 
292*53ee8cc1Swenshuai.xi     return  TRUE;
293*53ee8cc1Swenshuai.xi }
294*53ee8cc1Swenshuai.xi 
295*53ee8cc1Swenshuai.xi ////////////////////////////////////////////////////////////////////////////////
296*53ee8cc1Swenshuai.xi /// @brief \b Function  \b Name: HAL_PWM_Oen
297*53ee8cc1Swenshuai.xi /// @brief \b Function  \b Description: Switch PWM PAD as Output or Input
298*53ee8cc1Swenshuai.xi /// @param <IN>         \b MS_U16 : index
299*53ee8cc1Swenshuai.xi /// @param <IN>         \b MS_BOOL : letch, 1 for Input; 0 for Output
300*53ee8cc1Swenshuai.xi /// @param <OUT>      \b None :
301*53ee8cc1Swenshuai.xi /// @param <RET>       \b MS_BOOL :
302*53ee8cc1Swenshuai.xi /// @param <GLOBAL>  \b None :
303*53ee8cc1Swenshuai.xi ////////////////////////////////////////////////////////////////////////////////
HAL_PWM_Oen(PWM_ChNum index,MS_BOOL letch)304*53ee8cc1Swenshuai.xi MS_BOOL HAL_PWM_Oen(PWM_ChNum index, MS_BOOL letch)
305*53ee8cc1Swenshuai.xi {
306*53ee8cc1Swenshuai.xi     //Use the PWM oen in ChipTop Reg first, if it provides for.
307*53ee8cc1Swenshuai.xi 
308*53ee8cc1Swenshuai.xi     switch(index)
309*53ee8cc1Swenshuai.xi     {
310*53ee8cc1Swenshuai.xi         case E_PWM_CH0:
311*53ee8cc1Swenshuai.xi             HAL_TOP_WriteRegBit(REG_PWM_OEN, BITS(0:0, letch), BMASK(0:0));
312*53ee8cc1Swenshuai.xi             break;
313*53ee8cc1Swenshuai.xi         case E_PWM_CH1:
314*53ee8cc1Swenshuai.xi 			HAL_TOP_WriteRegBit(REG_PWM_OEN, BITS(1:1, letch), BMASK(1:1));
315*53ee8cc1Swenshuai.xi 			HAL_TOP_WriteRegBit(REG_PWM1_MODE, BITS(5:4, 1), BMASK(5:4));
316*53ee8cc1Swenshuai.xi             break;
317*53ee8cc1Swenshuai.xi         case E_PWM_CH2:
318*53ee8cc1Swenshuai.xi 			HAL_TOP_WriteRegBit(REG_PWM_OEN, BITS(2:2, letch), BMASK(2:2));
319*53ee8cc1Swenshuai.xi             break;
320*53ee8cc1Swenshuai.xi         case E_PWM_CH3:
321*53ee8cc1Swenshuai.xi 			HAL_TOP_WriteRegBit(REG_PWM_OEN, BITS(3:3, letch), BMASK(3:3));
322*53ee8cc1Swenshuai.xi             break;
323*53ee8cc1Swenshuai.xi         case E_PWM_CH4:
324*53ee8cc1Swenshuai.xi 			HAL_TOP_WriteRegBit(REG_PWM_OEN, BITS(4:4, letch), BMASK(4:4));
325*53ee8cc1Swenshuai.xi             break;
326*53ee8cc1Swenshuai.xi         case E_PWM_CH5:
327*53ee8cc1Swenshuai.xi             HAL_TOP_WriteRegBit(REG_PWM_OEN, BITS(5:5, letch), BMASK(4:4));
328*53ee8cc1Swenshuai.xi             break;
329*53ee8cc1Swenshuai.xi 
330*53ee8cc1Swenshuai.xi         case E_PWM_CH6:
331*53ee8cc1Swenshuai.xi         case E_PWM_CH7:
332*53ee8cc1Swenshuai.xi         case E_PWM_CH8:
333*53ee8cc1Swenshuai.xi         case E_PWM_CH9:
334*53ee8cc1Swenshuai.xi 		default:
335*53ee8cc1Swenshuai.xi 			printf("[ERROR] No Support PWM%d in Miami Platform\n", (int)index);
336*53ee8cc1Swenshuai.xi             UNUSED(letch);
337*53ee8cc1Swenshuai.xi             break;
338*53ee8cc1Swenshuai.xi     }
339*53ee8cc1Swenshuai.xi 
340*53ee8cc1Swenshuai.xi     return TRUE;
341*53ee8cc1Swenshuai.xi }
342*53ee8cc1Swenshuai.xi 
343*53ee8cc1Swenshuai.xi ////////////////////////////////////////////////////////////////////////////////
344*53ee8cc1Swenshuai.xi /// @brief \b Function   \b Name : HAL_PWM_UnitDiv
345*53ee8cc1Swenshuai.xi /// @brief \b Function   \b Description : Set the Unit_Div of the pwm
346*53ee8cc1Swenshuai.xi /// @param <IN>          \b MS_U16 : the Unit_Div value
347*53ee8cc1Swenshuai.xi /// @param <OUT>       \b None :
348*53ee8cc1Swenshuai.xi /// @param <RET>        \b MS_BOOL : 1 for doen; 0 for not done
349*53ee8cc1Swenshuai.xi /// @param <GLOBAL>   \b None :
350*53ee8cc1Swenshuai.xi ////////////////////////////////////////////////////////////////////////////////
HAL_PWM_UnitDiv(MS_U16 u16DivPWM)351*53ee8cc1Swenshuai.xi MS_BOOL HAL_PWM_UnitDiv(MS_U16 u16DivPWM)
352*53ee8cc1Swenshuai.xi {
353*53ee8cc1Swenshuai.xi     UNUSED(u16DivPWM);
354*53ee8cc1Swenshuai.xi     printf("[ERROR] No Support PWM Clock Unit Divider in Miami Platform\n");
355*53ee8cc1Swenshuai.xi     return FALSE;
356*53ee8cc1Swenshuai.xi }
357*53ee8cc1Swenshuai.xi 
358*53ee8cc1Swenshuai.xi ////////////////////////////////////////////////////////////////////////////////
359*53ee8cc1Swenshuai.xi /// @brief \b Function   \b Name : HAL_PWM_Period
360*53ee8cc1Swenshuai.xi /// @brief \b Function   \b Description : Set the period of the specific pwm
361*53ee8cc1Swenshuai.xi /// @param <IN>          \b PWM_ChNum : Enum of the PWM CH
362*53ee8cc1Swenshuai.xi /// @param <IN>          \b MS_U32 : the 18-bit Period value
363*53ee8cc1Swenshuai.xi /// @param <OUT>       \b None :
364*53ee8cc1Swenshuai.xi /// @param <RET>        \b None :
365*53ee8cc1Swenshuai.xi /// @param <GLOBAL>   \b None :
366*53ee8cc1Swenshuai.xi ////////////////////////////////////////////////////////////////////////////////
HAL_PWM_Period(PWM_ChNum index,MS_U32 u32PeriodPWM)367*53ee8cc1Swenshuai.xi void HAL_PWM_Period(PWM_ChNum index, MS_U32 u32PeriodPWM)
368*53ee8cc1Swenshuai.xi {
369*53ee8cc1Swenshuai.xi     MS_U16  Period_L;
370*53ee8cc1Swenshuai.xi     MS_U16  Period_H;
371*53ee8cc1Swenshuai.xi     Period_L = (MS_U16)u32PeriodPWM;
372*53ee8cc1Swenshuai.xi     Period_H = (MS_U16)(u32PeriodPWM >> 16);
373*53ee8cc1Swenshuai.xi 
374*53ee8cc1Swenshuai.xi     HAL_SUBBANK1;
375*53ee8cc1Swenshuai.xi     _HAL_PWM_VDBen_SW(index, 0);
376*53ee8cc1Swenshuai.xi     /* the Period capability is restricted to ONLY 18-bit */
377*53ee8cc1Swenshuai.xi     switch(index)
378*53ee8cc1Swenshuai.xi     {
379*53ee8cc1Swenshuai.xi         case E_PWM_CH0:
380*53ee8cc1Swenshuai.xi             HAL_PWM_Write2Byte(REG_PWM0_PERIOD, Period_L);
381*53ee8cc1Swenshuai.xi             HAL_PWM_WriteRegBit(REG_PWM0_PERIOD_EXT, BITS(1:0, Period_H), BMASK(1:0));
382*53ee8cc1Swenshuai.xi             break;
383*53ee8cc1Swenshuai.xi         case E_PWM_CH1:
384*53ee8cc1Swenshuai.xi             HAL_PWM_Write2Byte(REG_PWM1_PERIOD, Period_L);
385*53ee8cc1Swenshuai.xi             HAL_PWM_WriteRegBit(REG_PWM1_PERIOD_EXT, BITS(3:2, Period_H), BMASK(3:2));
386*53ee8cc1Swenshuai.xi             break;
387*53ee8cc1Swenshuai.xi         case E_PWM_CH2:
388*53ee8cc1Swenshuai.xi             HAL_PWM_Write2Byte(REG_PWM2_PERIOD, Period_L);
389*53ee8cc1Swenshuai.xi             HAL_PWM_WriteRegBit(REG_PWM2_PERIOD_EXT, BITS(5:4, Period_H), BMASK(5:4));
390*53ee8cc1Swenshuai.xi             break;
391*53ee8cc1Swenshuai.xi         case E_PWM_CH3:
392*53ee8cc1Swenshuai.xi             HAL_PWM_Write2Byte(REG_PWM3_PERIOD, Period_L);
393*53ee8cc1Swenshuai.xi             HAL_PWM_WriteRegBit(REG_PWM3_PERIOD_EXT, BITS(7:6, Period_H), BMASK(7:6));
394*53ee8cc1Swenshuai.xi             break;
395*53ee8cc1Swenshuai.xi         case E_PWM_CH4:
396*53ee8cc1Swenshuai.xi             HAL_PWM_Write2Byte(REG_PWM4_PERIOD, Period_L);
397*53ee8cc1Swenshuai.xi             HAL_PWM_WriteRegBit(REG_PWM4_PERIOD_EXT, BITS(9:8, Period_H), BMASK(9:8));
398*53ee8cc1Swenshuai.xi             break;
399*53ee8cc1Swenshuai.xi         case E_PWM_CH5:
400*53ee8cc1Swenshuai.xi             HAL_PWM_Write2Byte(REG_PWM5_PERIOD, Period_L);
401*53ee8cc1Swenshuai.xi             HAL_PWM_WriteRegBit(REG_PWM5_PERIOD_EXT, BITS(11:10, Period_H), BMASK(11:10));
402*53ee8cc1Swenshuai.xi             break;
403*53ee8cc1Swenshuai.xi 
404*53ee8cc1Swenshuai.xi         case E_PWM_CH6:
405*53ee8cc1Swenshuai.xi         case E_PWM_CH7:
406*53ee8cc1Swenshuai.xi         case E_PWM_CH8:
407*53ee8cc1Swenshuai.xi         case E_PWM_CH9:
408*53ee8cc1Swenshuai.xi 		default:
409*53ee8cc1Swenshuai.xi             printf("[ERROR] No Support PWM%d in Miami Platform\n", (int)index);
410*53ee8cc1Swenshuai.xi             UNUSED(Period_L);
411*53ee8cc1Swenshuai.xi             UNUSED(Period_H);
412*53ee8cc1Swenshuai.xi             break;
413*53ee8cc1Swenshuai.xi     }
414*53ee8cc1Swenshuai.xi 
415*53ee8cc1Swenshuai.xi     _HAL_PWM_VDBen_SW(index, 1);
416*53ee8cc1Swenshuai.xi     HAL_SUBBANK0;
417*53ee8cc1Swenshuai.xi }
418*53ee8cc1Swenshuai.xi 
HAL_PWM_GetPeriod(PWM_ChNum index)419*53ee8cc1Swenshuai.xi MS_U32 HAL_PWM_GetPeriod(PWM_ChNum index)
420*53ee8cc1Swenshuai.xi {
421*53ee8cc1Swenshuai.xi     MS_U16  Period_L=0, Period_H=0;
422*53ee8cc1Swenshuai.xi     HAL_SUBBANK1;
423*53ee8cc1Swenshuai.xi     _HAL_PWM_VDBen_SW(index,0);
424*53ee8cc1Swenshuai.xi     switch(index)
425*53ee8cc1Swenshuai.xi     {
426*53ee8cc1Swenshuai.xi         case E_PWM_CH0:
427*53ee8cc1Swenshuai.xi             Period_L = HAL_PWM_Read2Byte(REG_PWM0_PERIOD);
428*53ee8cc1Swenshuai.xi             Period_H = HAL_PWM_ReadByte(REG_PWM0_PERIOD_EXT) & BMASK(1:0);
429*53ee8cc1Swenshuai.xi             break;
430*53ee8cc1Swenshuai.xi         case E_PWM_CH1:
431*53ee8cc1Swenshuai.xi             Period_L = HAL_PWM_Read2Byte(REG_PWM1_PERIOD);
432*53ee8cc1Swenshuai.xi             Period_H = (HAL_PWM_ReadByte(REG_PWM1_PERIOD_EXT) & BMASK(3:2)) >> 2;
433*53ee8cc1Swenshuai.xi             break;
434*53ee8cc1Swenshuai.xi         case E_PWM_CH2:
435*53ee8cc1Swenshuai.xi             Period_L = HAL_PWM_Read2Byte(REG_PWM2_PERIOD);
436*53ee8cc1Swenshuai.xi             Period_H = (HAL_PWM_ReadByte(REG_PWM2_PERIOD_EXT) & BMASK(5:4)) >> 4;
437*53ee8cc1Swenshuai.xi             break;
438*53ee8cc1Swenshuai.xi         case E_PWM_CH3:
439*53ee8cc1Swenshuai.xi             Period_L = HAL_PWM_Read2Byte(REG_PWM3_PERIOD);
440*53ee8cc1Swenshuai.xi             Period_H = (HAL_PWM_ReadByte(REG_PWM3_PERIOD_EXT) & BMASK(7:6)) >> 6;
441*53ee8cc1Swenshuai.xi             break;
442*53ee8cc1Swenshuai.xi         case E_PWM_CH4:
443*53ee8cc1Swenshuai.xi             Period_L = HAL_PWM_Read2Byte(REG_PWM4_PERIOD);
444*53ee8cc1Swenshuai.xi             Period_H = (HAL_PWM_ReadByte(REG_PWM4_PERIOD_EXT) & BMASK(9:8)) >> 8;
445*53ee8cc1Swenshuai.xi             break;
446*53ee8cc1Swenshuai.xi         case E_PWM_CH5:
447*53ee8cc1Swenshuai.xi             Period_L = HAL_PWM_Read2Byte(REG_PWM5_PERIOD);
448*53ee8cc1Swenshuai.xi             Period_H = (HAL_PWM_Read2Byte(REG_PWM5_PERIOD_EXT) & BMASK(11:10)) >> 8;
449*53ee8cc1Swenshuai.xi             break;
450*53ee8cc1Swenshuai.xi         case E_PWM_CH6:
451*53ee8cc1Swenshuai.xi         case E_PWM_CH7:
452*53ee8cc1Swenshuai.xi         case E_PWM_CH8:
453*53ee8cc1Swenshuai.xi         case E_PWM_CH9:
454*53ee8cc1Swenshuai.xi         printf("[Utopia] The PWM%d is not support\n", (int)index);
455*53ee8cc1Swenshuai.xi             UNUSED(Period_L);
456*53ee8cc1Swenshuai.xi             UNUSED(Period_H);
457*53ee8cc1Swenshuai.xi             break;
458*53ee8cc1Swenshuai.xi         default:
459*53ee8cc1Swenshuai.xi             break;
460*53ee8cc1Swenshuai.xi     }
461*53ee8cc1Swenshuai.xi     _HAL_PWM_VDBen_SW(index,1);
462*53ee8cc1Swenshuai.xi     HAL_SUBBANK0;
463*53ee8cc1Swenshuai.xi     return ((MS_U32)Period_H << 16 | Period_L);
464*53ee8cc1Swenshuai.xi }
465*53ee8cc1Swenshuai.xi ////////////////////////////////////////////////////////////////////////////////
466*53ee8cc1Swenshuai.xi /// @brief \b Function   \b Name : HAL_PWM_DutyCycle
467*53ee8cc1Swenshuai.xi /// @brief \b Function   \b Description : Set the Duty of the specific pwm
468*53ee8cc1Swenshuai.xi /// @param <IN>          \b PWM_ChNum : Enum of the PWM CH
469*53ee8cc1Swenshuai.xi /// @param <IN>          \b MS_U32 : the 18-bit Duty value
470*53ee8cc1Swenshuai.xi /// @param <OUT>       \b None :
471*53ee8cc1Swenshuai.xi /// @param <RET>        \b None :
472*53ee8cc1Swenshuai.xi /// @param <GLOBAL>   \b None :
473*53ee8cc1Swenshuai.xi ////////////////////////////////////////////////////////////////////////////////
HAL_PWM_DutyCycle(PWM_ChNum index,MS_U32 u32DutyPWM)474*53ee8cc1Swenshuai.xi void HAL_PWM_DutyCycle(PWM_ChNum index, MS_U32 u32DutyPWM)
475*53ee8cc1Swenshuai.xi {
476*53ee8cc1Swenshuai.xi     MS_U16  Duty_L, Duty_H;
477*53ee8cc1Swenshuai.xi 
478*53ee8cc1Swenshuai.xi     Duty_L = (MS_U16)u32DutyPWM;
479*53ee8cc1Swenshuai.xi     Duty_H = (MS_U8)(u32DutyPWM >> 16);
480*53ee8cc1Swenshuai.xi 
481*53ee8cc1Swenshuai.xi     HAL_SUBBANK1;
482*53ee8cc1Swenshuai.xi     _HAL_PWM_VDBen_SW(index, 0);
483*53ee8cc1Swenshuai.xi     /* the Duty capability is restricted to ONLY 10-bit */
484*53ee8cc1Swenshuai.xi     switch(index)
485*53ee8cc1Swenshuai.xi     {
486*53ee8cc1Swenshuai.xi         case E_PWM_CH0:
487*53ee8cc1Swenshuai.xi             HAL_PWM_Write2Byte(REG_PWM0_DUTY, Duty_L);
488*53ee8cc1Swenshuai.xi             HAL_PWM_WriteRegBit(REG_PWM0_DUTY_EXT, BITS(1:0, Duty_H), BMASK(1:0));
489*53ee8cc1Swenshuai.xi             break;
490*53ee8cc1Swenshuai.xi         case E_PWM_CH1:
491*53ee8cc1Swenshuai.xi             HAL_PWM_Write2Byte(REG_PWM1_DUTY, Duty_L);
492*53ee8cc1Swenshuai.xi             HAL_PWM_WriteRegBit(REG_PWM1_DUTY_EXT, BITS(3:2, Duty_H), BMASK(3:2));
493*53ee8cc1Swenshuai.xi             break;
494*53ee8cc1Swenshuai.xi         case E_PWM_CH2:
495*53ee8cc1Swenshuai.xi             HAL_PWM_Write2Byte(REG_PWM2_DUTY, Duty_L);
496*53ee8cc1Swenshuai.xi 	        HAL_PWM_WriteRegBit(REG_PWM2_DUTY_EXT, BITS(5:4, Duty_H), BMASK(5:4));
497*53ee8cc1Swenshuai.xi             break;
498*53ee8cc1Swenshuai.xi         case E_PWM_CH3:
499*53ee8cc1Swenshuai.xi             HAL_PWM_Write2Byte(REG_PWM3_DUTY, Duty_L);
500*53ee8cc1Swenshuai.xi             HAL_PWM_WriteRegBit(REG_PWM3_DUTY_EXT, BITS(7:6, Duty_H), BMASK(7:6));
501*53ee8cc1Swenshuai.xi             break;
502*53ee8cc1Swenshuai.xi         case E_PWM_CH4:
503*53ee8cc1Swenshuai.xi             HAL_PWM_Write2Byte(REG_PWM4_DUTY, Duty_L);
504*53ee8cc1Swenshuai.xi             HAL_PWM_WriteRegBit(REG_PWM4_DUTY_EXT, BITS(9:8, Duty_H), BMASK(9:8));
505*53ee8cc1Swenshuai.xi             break;
506*53ee8cc1Swenshuai.xi         case E_PWM_CH5:
507*53ee8cc1Swenshuai.xi             HAL_PWM_Write2Byte(REG_PWM5_DUTY, Duty_L);
508*53ee8cc1Swenshuai.xi             HAL_PWM_WriteRegBit(REG_PWM5_DUTY_EXT, BITS(11:10, Duty_H), BMASK(11:10));
509*53ee8cc1Swenshuai.xi             break;
510*53ee8cc1Swenshuai.xi 
511*53ee8cc1Swenshuai.xi         case E_PWM_CH6:
512*53ee8cc1Swenshuai.xi         case E_PWM_CH7:
513*53ee8cc1Swenshuai.xi         case E_PWM_CH8:
514*53ee8cc1Swenshuai.xi         case E_PWM_CH9:
515*53ee8cc1Swenshuai.xi 		default:
516*53ee8cc1Swenshuai.xi 			printf("[ERROR] No Support PWM%d in Miami Platform\n", (int)index);
517*53ee8cc1Swenshuai.xi             UNUSED(Duty_L);
518*53ee8cc1Swenshuai.xi             UNUSED(Duty_H);
519*53ee8cc1Swenshuai.xi             break;
520*53ee8cc1Swenshuai.xi     }
521*53ee8cc1Swenshuai.xi 
522*53ee8cc1Swenshuai.xi     _HAL_PWM_VDBen_SW(index, 1);
523*53ee8cc1Swenshuai.xi     HAL_SUBBANK0;
524*53ee8cc1Swenshuai.xi }
525*53ee8cc1Swenshuai.xi 
HAL_PWM_GetDutyCycle(PWM_ChNum index)526*53ee8cc1Swenshuai.xi MS_U32 HAL_PWM_GetDutyCycle(PWM_ChNum index)
527*53ee8cc1Swenshuai.xi {
528*53ee8cc1Swenshuai.xi     MS_U16  Duty_L=0, Duty_H=0;
529*53ee8cc1Swenshuai.xi 
530*53ee8cc1Swenshuai.xi     //Duty_L = (MS_U16)u32DutyPWM;
531*53ee8cc1Swenshuai.xi     //Duty_H = (MS_U8)(u32DutyPWM >> 16);
532*53ee8cc1Swenshuai.xi 
533*53ee8cc1Swenshuai.xi     HAL_SUBBANK1;
534*53ee8cc1Swenshuai.xi     _HAL_PWM_VDBen_SW(index,0);
535*53ee8cc1Swenshuai.xi     /* the Duty capability is restricted to ONLY 10-bit */
536*53ee8cc1Swenshuai.xi     switch(index)
537*53ee8cc1Swenshuai.xi     {
538*53ee8cc1Swenshuai.xi         case E_PWM_CH0:
539*53ee8cc1Swenshuai.xi             Duty_L = HAL_PWM_Read2Byte(REG_PWM0_DUTY);
540*53ee8cc1Swenshuai.xi             Duty_H = HAL_PWM_ReadByte(REG_PWM0_DUTY_EXT) & BMASK(1:0);
541*53ee8cc1Swenshuai.xi             break;
542*53ee8cc1Swenshuai.xi         case E_PWM_CH1:
543*53ee8cc1Swenshuai.xi             Duty_L = HAL_PWM_Read2Byte(REG_PWM1_DUTY);
544*53ee8cc1Swenshuai.xi             Duty_H = (HAL_PWM_ReadByte(REG_PWM1_DUTY_EXT) & BMASK(3:2)) >> 2;
545*53ee8cc1Swenshuai.xi             break;
546*53ee8cc1Swenshuai.xi         case E_PWM_CH2:
547*53ee8cc1Swenshuai.xi             Duty_L = HAL_PWM_Read2Byte(REG_PWM2_DUTY);
548*53ee8cc1Swenshuai.xi             Duty_H = (HAL_PWM_ReadByte(REG_PWM2_DUTY_EXT) & BMASK(5:4)) >> 4;
549*53ee8cc1Swenshuai.xi             break;
550*53ee8cc1Swenshuai.xi         case E_PWM_CH3:
551*53ee8cc1Swenshuai.xi             Duty_L = HAL_PWM_Read2Byte(REG_PWM3_DUTY);
552*53ee8cc1Swenshuai.xi             Duty_H = (HAL_PWM_ReadByte(REG_PWM3_DUTY_EXT) & BMASK(7:6)) >> 6;
553*53ee8cc1Swenshuai.xi             break;
554*53ee8cc1Swenshuai.xi         case E_PWM_CH4:
555*53ee8cc1Swenshuai.xi             Duty_L = HAL_PWM_Read2Byte(REG_PWM4_DUTY);
556*53ee8cc1Swenshuai.xi             Duty_H = (HAL_PWM_ReadByte(REG_PWM4_DUTY_EXT) & BMASK(9:8)) >> 8;
557*53ee8cc1Swenshuai.xi             break;
558*53ee8cc1Swenshuai.xi         case E_PWM_CH5:
559*53ee8cc1Swenshuai.xi             Duty_L = HAL_PWM_Read2Byte(REG_PWM5_DUTY);
560*53ee8cc1Swenshuai.xi             Duty_H = (HAL_PWM_Read2Byte(REG_PWM5_DUTY_EXT) & BMASK(11:10)) >> 8;
561*53ee8cc1Swenshuai.xi             break;
562*53ee8cc1Swenshuai.xi         case E_PWM_CH6:
563*53ee8cc1Swenshuai.xi         case E_PWM_CH7:
564*53ee8cc1Swenshuai.xi         case E_PWM_CH8:
565*53ee8cc1Swenshuai.xi         case E_PWM_CH9:
566*53ee8cc1Swenshuai.xi             printf("[Utopia] The PWM%d is not support\n", (int)index);
567*53ee8cc1Swenshuai.xi             UNUSED(Duty_L);
568*53ee8cc1Swenshuai.xi             UNUSED(Duty_H);
569*53ee8cc1Swenshuai.xi             break;
570*53ee8cc1Swenshuai.xi         default:
571*53ee8cc1Swenshuai.xi             break;
572*53ee8cc1Swenshuai.xi     }
573*53ee8cc1Swenshuai.xi     _HAL_PWM_VDBen_SW(index,1);
574*53ee8cc1Swenshuai.xi     HAL_SUBBANK0;
575*53ee8cc1Swenshuai.xi     return ((MS_U32)Duty_H << 16 | Duty_L);
576*53ee8cc1Swenshuai.xi }
577*53ee8cc1Swenshuai.xi 
578*53ee8cc1Swenshuai.xi ////////////////////////////////////////////////////////////////////////////////
579*53ee8cc1Swenshuai.xi /// @brief \b Function   \b Name : HAL_PWM_Div
580*53ee8cc1Swenshuai.xi /// @brief \b Function   \b Description : Set the Div of the specific pwm
581*53ee8cc1Swenshuai.xi /// @param <IN>          \b PWM_ChNum : Enum of the PWM CH
582*53ee8cc1Swenshuai.xi /// @param <IN>          \b MS_U16 : the 16-bit Div value
583*53ee8cc1Swenshuai.xi /// @param <OUT>       \b None :
584*53ee8cc1Swenshuai.xi /// @param <RET>        \b None :
585*53ee8cc1Swenshuai.xi /// @param <GLOBAL>   \b None :
586*53ee8cc1Swenshuai.xi ////////////////////////////////////////////////////////////////////////////////
HAL_PWM_Div(PWM_ChNum index,MS_U16 u16DivPWM)587*53ee8cc1Swenshuai.xi void HAL_PWM_Div(PWM_ChNum index, MS_U16 u16DivPWM)
588*53ee8cc1Swenshuai.xi {
589*53ee8cc1Swenshuai.xi 	MS_U8 u8DivPWM[2] = {0};
590*53ee8cc1Swenshuai.xi 
591*53ee8cc1Swenshuai.xi 	u8DivPWM[0] = (MS_U8)(u16DivPWM&0xFF);
592*53ee8cc1Swenshuai.xi 	u8DivPWM[1] = (MS_U8)(u16DivPWM >> 8);
593*53ee8cc1Swenshuai.xi 
594*53ee8cc1Swenshuai.xi     HAL_SUBBANK1;
595*53ee8cc1Swenshuai.xi     /* the Div capability is restricted to ONLY 16-bit */
596*53ee8cc1Swenshuai.xi     switch(index)
597*53ee8cc1Swenshuai.xi     {
598*53ee8cc1Swenshuai.xi         case E_PWM_CH0:
599*53ee8cc1Swenshuai.xi             HAL_PWM_WriteByte(REG_PWM0_DIV, u8DivPWM[0]);
600*53ee8cc1Swenshuai.xi             HAL_PWM_WriteByte(REG_PWM0_DIV_EXT, u8DivPWM[1]);
601*53ee8cc1Swenshuai.xi             break;
602*53ee8cc1Swenshuai.xi         case E_PWM_CH1:
603*53ee8cc1Swenshuai.xi             HAL_PWM_WriteByte(REG_PWM1_DIV, u8DivPWM[0]);
604*53ee8cc1Swenshuai.xi 			HAL_PWM_WriteRegBit(REG_PWM1_DIV_EXT, u16DivPWM, BMASK(15:8));
605*53ee8cc1Swenshuai.xi             break;
606*53ee8cc1Swenshuai.xi         case E_PWM_CH2:
607*53ee8cc1Swenshuai.xi             HAL_PWM_WriteByte(REG_PWM2_DIV, u8DivPWM[0]);
608*53ee8cc1Swenshuai.xi             HAL_PWM_WriteByte(REG_PWM2_DIV_EXT, u8DivPWM[1]);
609*53ee8cc1Swenshuai.xi             break;
610*53ee8cc1Swenshuai.xi         case E_PWM_CH3:
611*53ee8cc1Swenshuai.xi             HAL_PWM_WriteByte(REG_PWM3_DIV, u8DivPWM[0]);
612*53ee8cc1Swenshuai.xi             HAL_PWM_WriteRegBit(REG_PWM3_DIV_EXT, u16DivPWM, BMASK(15:8));
613*53ee8cc1Swenshuai.xi             break;
614*53ee8cc1Swenshuai.xi         case E_PWM_CH4:
615*53ee8cc1Swenshuai.xi             HAL_PWM_WriteByte(REG_PWM4_DIV, u8DivPWM[0]);
616*53ee8cc1Swenshuai.xi             HAL_PWM_WriteByte(REG_PWM4_DIV_EXT, u8DivPWM[1]);
617*53ee8cc1Swenshuai.xi             break;
618*53ee8cc1Swenshuai.xi         case E_PWM_CH5:
619*53ee8cc1Swenshuai.xi             HAL_PWM_WriteByte(REG_PWM5_DIV, u8DivPWM[0]);
620*53ee8cc1Swenshuai.xi             HAL_PWM_WriteRegBit(REG_PWM5_DIV_EXT, u16DivPWM, BMASK(15:8));
621*53ee8cc1Swenshuai.xi             break;
622*53ee8cc1Swenshuai.xi 
623*53ee8cc1Swenshuai.xi         case E_PWM_CH6:
624*53ee8cc1Swenshuai.xi         case E_PWM_CH7:
625*53ee8cc1Swenshuai.xi         case E_PWM_CH8:
626*53ee8cc1Swenshuai.xi         case E_PWM_CH9:
627*53ee8cc1Swenshuai.xi 		default:
628*53ee8cc1Swenshuai.xi 	        printf("[ERROR] No Support PWM%d in Miami Platform\n", (int)index);
629*53ee8cc1Swenshuai.xi             UNUSED(u16DivPWM);
630*53ee8cc1Swenshuai.xi             break;
631*53ee8cc1Swenshuai.xi     }
632*53ee8cc1Swenshuai.xi 
633*53ee8cc1Swenshuai.xi     HAL_SUBBANK0;
634*53ee8cc1Swenshuai.xi }
635*53ee8cc1Swenshuai.xi 
636*53ee8cc1Swenshuai.xi ////////////////////////////////////////////////////////////////////////////////
637*53ee8cc1Swenshuai.xi /// @brief \b Function   \b Name : HAL_PWM_Polarity
638*53ee8cc1Swenshuai.xi /// @brief \b Function   \b Description : Set the Polarity of the specific pwm
639*53ee8cc1Swenshuai.xi /// @param <IN>          \b PWM_ChNum : Enum of the PWM CH
640*53ee8cc1Swenshuai.xi /// @param <IN>          \b MS_BOOL : 1 for enable; 0 for disable
641*53ee8cc1Swenshuai.xi /// @param <OUT>       \b None :
642*53ee8cc1Swenshuai.xi /// @param <RET>        \b None :
643*53ee8cc1Swenshuai.xi /// @param <GLOBAL>   \b None :
644*53ee8cc1Swenshuai.xi ////////////////////////////////////////////////////////////////////////////////
HAL_PWM_Polarity(PWM_ChNum index,MS_BOOL bPolPWM)645*53ee8cc1Swenshuai.xi void HAL_PWM_Polarity(PWM_ChNum index, MS_BOOL bPolPWM)
646*53ee8cc1Swenshuai.xi {
647*53ee8cc1Swenshuai.xi     HAL_SUBBANK1;
648*53ee8cc1Swenshuai.xi     switch(index)
649*53ee8cc1Swenshuai.xi     {
650*53ee8cc1Swenshuai.xi         case E_PWM_CH0:
651*53ee8cc1Swenshuai.xi             HAL_PWM_WriteRegBit(REG_PWM0_PORARITY,BITS(8:8, bPolPWM), BMASK(8:8));
652*53ee8cc1Swenshuai.xi             break;
653*53ee8cc1Swenshuai.xi         case E_PWM_CH1:
654*53ee8cc1Swenshuai.xi             HAL_PWM_WriteRegBit(REG_PWM1_PORARITY,BITS(8:8, bPolPWM), BMASK(8:8));
655*53ee8cc1Swenshuai.xi             break;
656*53ee8cc1Swenshuai.xi         case E_PWM_CH2:
657*53ee8cc1Swenshuai.xi             HAL_PWM_WriteRegBit(REG_PWM2_PORARITY,BITS(8:8, bPolPWM), BMASK(8:8));
658*53ee8cc1Swenshuai.xi             break;
659*53ee8cc1Swenshuai.xi         case E_PWM_CH3:
660*53ee8cc1Swenshuai.xi             HAL_PWM_WriteRegBit(REG_PWM3_PORARITY,BITS(8:8, bPolPWM), BMASK(8:8));
661*53ee8cc1Swenshuai.xi             break;
662*53ee8cc1Swenshuai.xi         case E_PWM_CH4:
663*53ee8cc1Swenshuai.xi             HAL_PWM_WriteRegBit(REG_PWM4_PORARITY,BITS(8:8, bPolPWM), BMASK(8:8));
664*53ee8cc1Swenshuai.xi             break;
665*53ee8cc1Swenshuai.xi         case E_PWM_CH5:
666*53ee8cc1Swenshuai.xi             HAL_PWM_WriteRegBit(REG_PWM5_PORARITY,BITS(8:8, bPolPWM), BMASK(8:8));
667*53ee8cc1Swenshuai.xi             break;
668*53ee8cc1Swenshuai.xi         case E_PWM_CH6:
669*53ee8cc1Swenshuai.xi         case E_PWM_CH7:
670*53ee8cc1Swenshuai.xi         case E_PWM_CH8:
671*53ee8cc1Swenshuai.xi         case E_PWM_CH9:
672*53ee8cc1Swenshuai.xi 		default:
673*53ee8cc1Swenshuai.xi 	        printf("[ERROR] No Support PWM%d in Miami Platform\n", (int)index);
674*53ee8cc1Swenshuai.xi             UNUSED(bPolPWM);
675*53ee8cc1Swenshuai.xi             break;
676*53ee8cc1Swenshuai.xi     }
677*53ee8cc1Swenshuai.xi 
678*53ee8cc1Swenshuai.xi     HAL_SUBBANK0;
679*53ee8cc1Swenshuai.xi }
680*53ee8cc1Swenshuai.xi 
681*53ee8cc1Swenshuai.xi ////////////////////////////////////////////////////////////////////////////////
682*53ee8cc1Swenshuai.xi /// @brief \b Function   \b Name : HAL_PWM_VDBen
683*53ee8cc1Swenshuai.xi /// @brief \b Function   \b Description : Set the Vsync Double buffer of the specific pwm
684*53ee8cc1Swenshuai.xi /// @param <IN>          \b PWM_ChNum : Enum of the PWM CH
685*53ee8cc1Swenshuai.xi /// @param <IN>          \b MS_BOOL : 1 for enable; 0 for disable
686*53ee8cc1Swenshuai.xi /// @param <OUT>       \b None :
687*53ee8cc1Swenshuai.xi /// @param <RET>        \b None :
688*53ee8cc1Swenshuai.xi /// @param <GLOBAL>   \b None :
689*53ee8cc1Swenshuai.xi ////////////////////////////////////////////////////////////////////////////////
HAL_PWM_VDBen(PWM_ChNum index,MS_BOOL bVdbenPWM)690*53ee8cc1Swenshuai.xi void HAL_PWM_VDBen(PWM_ChNum index, MS_BOOL bVdbenPWM)
691*53ee8cc1Swenshuai.xi {
692*53ee8cc1Swenshuai.xi     _gPWM_VDBen = bVdbenPWM;
693*53ee8cc1Swenshuai.xi 
694*53ee8cc1Swenshuai.xi     HAL_SUBBANK1;
695*53ee8cc1Swenshuai.xi 
696*53ee8cc1Swenshuai.xi     switch(index)
697*53ee8cc1Swenshuai.xi     {
698*53ee8cc1Swenshuai.xi         case E_PWM_CH0:
699*53ee8cc1Swenshuai.xi             HAL_PWM_WriteRegBit(REG_PWM0_VDBEN, BITS(9:9, bVdbenPWM), BMASK(9:9));
700*53ee8cc1Swenshuai.xi             break;
701*53ee8cc1Swenshuai.xi         case E_PWM_CH1:
702*53ee8cc1Swenshuai.xi             HAL_PWM_WriteRegBit(REG_PWM1_VDBEN, BITS(9:9, bVdbenPWM), BMASK(9:9));
703*53ee8cc1Swenshuai.xi             break;
704*53ee8cc1Swenshuai.xi         case E_PWM_CH2:
705*53ee8cc1Swenshuai.xi             HAL_PWM_WriteRegBit(REG_PWM2_VDBEN, BITS(9:9, bVdbenPWM), BMASK(9:9));
706*53ee8cc1Swenshuai.xi             break;
707*53ee8cc1Swenshuai.xi         case E_PWM_CH3:
708*53ee8cc1Swenshuai.xi             HAL_PWM_WriteRegBit(REG_PWM3_VDBEN, BITS(9:9, bVdbenPWM), BMASK(9:9));
709*53ee8cc1Swenshuai.xi             break;
710*53ee8cc1Swenshuai.xi         case E_PWM_CH4:
711*53ee8cc1Swenshuai.xi             HAL_PWM_WriteRegBit(REG_PWM4_VDBEN, BITS(9:9, bVdbenPWM), BMASK(9:9));
712*53ee8cc1Swenshuai.xi             break;
713*53ee8cc1Swenshuai.xi         case E_PWM_CH5:
714*53ee8cc1Swenshuai.xi             HAL_PWM_WriteRegBit(REG_PWM5_VDBEN, BITS(9:9, bVdbenPWM), BMASK(9:9));
715*53ee8cc1Swenshuai.xi             break;
716*53ee8cc1Swenshuai.xi 
717*53ee8cc1Swenshuai.xi         case E_PWM_CH6:
718*53ee8cc1Swenshuai.xi         case E_PWM_CH7:
719*53ee8cc1Swenshuai.xi         case E_PWM_CH8:
720*53ee8cc1Swenshuai.xi         case E_PWM_CH9:
721*53ee8cc1Swenshuai.xi 		default:
722*53ee8cc1Swenshuai.xi 	        printf("[ERROR] No Support PWM%d in Miami Platform\n", (int)index);
723*53ee8cc1Swenshuai.xi             UNUSED(bVdbenPWM);
724*53ee8cc1Swenshuai.xi             break;
725*53ee8cc1Swenshuai.xi     }
726*53ee8cc1Swenshuai.xi 
727*53ee8cc1Swenshuai.xi     HAL_SUBBANK0;
728*53ee8cc1Swenshuai.xi }
729*53ee8cc1Swenshuai.xi 
730*53ee8cc1Swenshuai.xi ////////////////////////////////////////////////////////////////////////////////
731*53ee8cc1Swenshuai.xi /// @brief \b Function   \b Name : HAL_PWM_Vrest
732*53ee8cc1Swenshuai.xi /// @brief \b Function   \b Description : Set the Hsync reset of the specific pwm
733*53ee8cc1Swenshuai.xi /// @param <IN>          \b PWM_ChNum : Enum of the PWM CH
734*53ee8cc1Swenshuai.xi /// @param <IN>          \b MS_BOOL : 1 for enable; 0 for disable
735*53ee8cc1Swenshuai.xi /// @param <OUT>       \b None :
736*53ee8cc1Swenshuai.xi /// @param <RET>        \b None :
737*53ee8cc1Swenshuai.xi /// @param <GLOBAL>   \b None :
738*53ee8cc1Swenshuai.xi ////////////////////////////////////////////////////////////////////////////////
HAL_PWM_Vrest(PWM_ChNum index,MS_BOOL bRstPWM)739*53ee8cc1Swenshuai.xi void HAL_PWM_Vrest(PWM_ChNum index, MS_BOOL bRstPWM)
740*53ee8cc1Swenshuai.xi {
741*53ee8cc1Swenshuai.xi     HAL_SUBBANK1;
742*53ee8cc1Swenshuai.xi 
743*53ee8cc1Swenshuai.xi     switch(index)
744*53ee8cc1Swenshuai.xi     {
745*53ee8cc1Swenshuai.xi         case E_PWM_CH0:
746*53ee8cc1Swenshuai.xi             HAL_PWM_WriteRegBit(REG_PWM0_RESET_EN, BITS(10:10, bRstPWM), BMASK(10:10));
747*53ee8cc1Swenshuai.xi             break;
748*53ee8cc1Swenshuai.xi         case E_PWM_CH1:
749*53ee8cc1Swenshuai.xi             HAL_PWM_WriteRegBit(REG_PWM1_RESET_EN, BITS(10:10, bRstPWM), BMASK(10:10));
750*53ee8cc1Swenshuai.xi             break;
751*53ee8cc1Swenshuai.xi         case E_PWM_CH2:
752*53ee8cc1Swenshuai.xi             HAL_PWM_WriteRegBit(REG_PWM2_RESET_EN, BITS(10:10, bRstPWM), BMASK(10:10));
753*53ee8cc1Swenshuai.xi             break;
754*53ee8cc1Swenshuai.xi         case E_PWM_CH3:
755*53ee8cc1Swenshuai.xi             HAL_PWM_WriteRegBit(REG_PWM3_RESET_EN, BITS(10:10, bRstPWM), BMASK(10:10));
756*53ee8cc1Swenshuai.xi             break;
757*53ee8cc1Swenshuai.xi         case E_PWM_CH4:
758*53ee8cc1Swenshuai.xi             HAL_PWM_WriteRegBit(REG_PWM4_RESET_EN, BITS(10:10, bRstPWM), BMASK(10:10));
759*53ee8cc1Swenshuai.xi             break;
760*53ee8cc1Swenshuai.xi         case E_PWM_CH5:
761*53ee8cc1Swenshuai.xi             HAL_PWM_WriteRegBit(REG_PWM5_RESET_EN, BITS(10:10, bRstPWM), BMASK(10:10));
762*53ee8cc1Swenshuai.xi             break;
763*53ee8cc1Swenshuai.xi 
764*53ee8cc1Swenshuai.xi         case E_PWM_CH6:
765*53ee8cc1Swenshuai.xi         case E_PWM_CH7:
766*53ee8cc1Swenshuai.xi         case E_PWM_CH8:
767*53ee8cc1Swenshuai.xi         case E_PWM_CH9:
768*53ee8cc1Swenshuai.xi 		default:
769*53ee8cc1Swenshuai.xi 	        printf("[ERROR] No Support PWM%d in Miami Platform\n", (int)index);
770*53ee8cc1Swenshuai.xi             UNUSED(bRstPWM);
771*53ee8cc1Swenshuai.xi             break;
772*53ee8cc1Swenshuai.xi     }
773*53ee8cc1Swenshuai.xi 
774*53ee8cc1Swenshuai.xi     HAL_SUBBANK0;
775*53ee8cc1Swenshuai.xi }
776*53ee8cc1Swenshuai.xi 
777*53ee8cc1Swenshuai.xi ////////////////////////////////////////////////////////////////////////////////
778*53ee8cc1Swenshuai.xi /// @brief \b Function   \b Name : HAL_PWM_DBen
779*53ee8cc1Swenshuai.xi /// @brief \b Function   \b Description : Set the Double buffer of the specific pwm
780*53ee8cc1Swenshuai.xi /// @param <IN>          \b PWM_ChNum : Enum of the PWM CH
781*53ee8cc1Swenshuai.xi /// @param <IN>          \b MS_BOOL : 1 for enable; 0 for disable
782*53ee8cc1Swenshuai.xi /// @param <OUT>       \b None :
783*53ee8cc1Swenshuai.xi /// @param <RET>        \b None :
784*53ee8cc1Swenshuai.xi /// @param <GLOBAL>   \b None :
785*53ee8cc1Swenshuai.xi ////////////////////////////////////////////////////////////////////////////////
HAL_PWM_DBen(PWM_ChNum index,MS_BOOL bdbenPWM)786*53ee8cc1Swenshuai.xi void HAL_PWM_DBen(PWM_ChNum index, MS_BOOL bdbenPWM)
787*53ee8cc1Swenshuai.xi {
788*53ee8cc1Swenshuai.xi 	//_gPWM_DBen = bdbenPWM;
789*53ee8cc1Swenshuai.xi 
790*53ee8cc1Swenshuai.xi     HAL_SUBBANK1;
791*53ee8cc1Swenshuai.xi 
792*53ee8cc1Swenshuai.xi     switch(index)
793*53ee8cc1Swenshuai.xi     {
794*53ee8cc1Swenshuai.xi         case E_PWM_CH0:
795*53ee8cc1Swenshuai.xi             HAL_PWM_WriteRegBit(REG_PWM0_DBEN, BITS(11:11, bdbenPWM), BMASK(11:11));
796*53ee8cc1Swenshuai.xi             break;
797*53ee8cc1Swenshuai.xi         case E_PWM_CH1:
798*53ee8cc1Swenshuai.xi             HAL_PWM_WriteRegBit(REG_PWM1_DBEN, BITS(11:11, bdbenPWM), BMASK(11:11));
799*53ee8cc1Swenshuai.xi             break;
800*53ee8cc1Swenshuai.xi         case E_PWM_CH2:
801*53ee8cc1Swenshuai.xi             HAL_PWM_WriteRegBit(REG_PWM2_DBEN, BITS(11:11, bdbenPWM), BMASK(11:11));
802*53ee8cc1Swenshuai.xi             break;
803*53ee8cc1Swenshuai.xi         case E_PWM_CH3:
804*53ee8cc1Swenshuai.xi             HAL_PWM_WriteRegBit(REG_PWM3_DBEN, BITS(11:11, bdbenPWM), BMASK(11:11));
805*53ee8cc1Swenshuai.xi             break;
806*53ee8cc1Swenshuai.xi         case E_PWM_CH4:
807*53ee8cc1Swenshuai.xi             HAL_PWM_WriteRegBit(REG_PWM4_DBEN, BITS(11:11, bdbenPWM), BMASK(11:11));
808*53ee8cc1Swenshuai.xi             break;
809*53ee8cc1Swenshuai.xi         case E_PWM_CH5:
810*53ee8cc1Swenshuai.xi             HAL_PWM_WriteRegBit(REG_PWM5_DBEN, BITS(11:11, bdbenPWM), BMASK(11:11));
811*53ee8cc1Swenshuai.xi             break;
812*53ee8cc1Swenshuai.xi 
813*53ee8cc1Swenshuai.xi         case E_PWM_CH6:
814*53ee8cc1Swenshuai.xi         case E_PWM_CH7:
815*53ee8cc1Swenshuai.xi         case E_PWM_CH8:
816*53ee8cc1Swenshuai.xi         case E_PWM_CH9:
817*53ee8cc1Swenshuai.xi 		default:
818*53ee8cc1Swenshuai.xi 	        printf("[ERROR] No Support PWM%d in Miami Platform\n", (int)index);
819*53ee8cc1Swenshuai.xi             UNUSED(bdbenPWM);
820*53ee8cc1Swenshuai.xi             break;
821*53ee8cc1Swenshuai.xi     }
822*53ee8cc1Swenshuai.xi 
823*53ee8cc1Swenshuai.xi     HAL_SUBBANK0;
824*53ee8cc1Swenshuai.xi }
825*53ee8cc1Swenshuai.xi 
HAL_PWM_IMPULSE_EN(PWM_ChNum index,MS_BOOL bdbenPWM)826*53ee8cc1Swenshuai.xi void HAL_PWM_IMPULSE_EN(PWM_ChNum index, MS_BOOL bdbenPWM)
827*53ee8cc1Swenshuai.xi {
828*53ee8cc1Swenshuai.xi     HAL_SUBBANK1;
829*53ee8cc1Swenshuai.xi 
830*53ee8cc1Swenshuai.xi     switch(index)
831*53ee8cc1Swenshuai.xi     {
832*53ee8cc1Swenshuai.xi         case E_PWM_CH0:
833*53ee8cc1Swenshuai.xi             HAL_PWM_WriteRegBit(REG_PWM0_IMPULSE_EN, BITS(12:12, bdbenPWM), BMASK(12:12));
834*53ee8cc1Swenshuai.xi             break;
835*53ee8cc1Swenshuai.xi         case E_PWM_CH1:
836*53ee8cc1Swenshuai.xi             HAL_PWM_WriteRegBit(REG_PWM1_IMPULSE_EN, BITS(12:12, bdbenPWM), BMASK(12:12));
837*53ee8cc1Swenshuai.xi             break;
838*53ee8cc1Swenshuai.xi         case E_PWM_CH2:
839*53ee8cc1Swenshuai.xi             HAL_PWM_WriteRegBit(REG_PWM2_IMPULSE_EN, BITS(12:12, bdbenPWM), BMASK(12:12));
840*53ee8cc1Swenshuai.xi             break;
841*53ee8cc1Swenshuai.xi         case E_PWM_CH3:
842*53ee8cc1Swenshuai.xi             HAL_PWM_WriteRegBit(REG_PWM3_IMPULSE_EN, BITS(12:12, bdbenPWM), BMASK(12:12));
843*53ee8cc1Swenshuai.xi             break;
844*53ee8cc1Swenshuai.xi         case E_PWM_CH4:
845*53ee8cc1Swenshuai.xi             HAL_PWM_WriteRegBit(REG_PWM4_IMPULSE_EN, BITS(12:12, bdbenPWM), BMASK(12:12));
846*53ee8cc1Swenshuai.xi             break;
847*53ee8cc1Swenshuai.xi         case E_PWM_CH5:
848*53ee8cc1Swenshuai.xi             HAL_PWM_WriteRegBit(REG_PWM5_IMPULSE_EN, BITS(12:12, bdbenPWM), BMASK(12:12));
849*53ee8cc1Swenshuai.xi             break;
850*53ee8cc1Swenshuai.xi 
851*53ee8cc1Swenshuai.xi         case E_PWM_CH6:
852*53ee8cc1Swenshuai.xi         case E_PWM_CH7:
853*53ee8cc1Swenshuai.xi         case E_PWM_CH8:
854*53ee8cc1Swenshuai.xi         case E_PWM_CH9:
855*53ee8cc1Swenshuai.xi 		default:
856*53ee8cc1Swenshuai.xi             printf("[ERROR] No Support PWM%d in Miami Platform\n", (int)index);
857*53ee8cc1Swenshuai.xi             UNUSED(bdbenPWM);
858*53ee8cc1Swenshuai.xi             break;
859*53ee8cc1Swenshuai.xi     }
860*53ee8cc1Swenshuai.xi 
861*53ee8cc1Swenshuai.xi     HAL_SUBBANK0;
862*53ee8cc1Swenshuai.xi }
863*53ee8cc1Swenshuai.xi 
864*53ee8cc1Swenshuai.xi 
HAL_PWM_ODDEVEN_SYNC(PWM_ChNum index,MS_BOOL bdbenPWM)865*53ee8cc1Swenshuai.xi void HAL_PWM_ODDEVEN_SYNC(PWM_ChNum index, MS_BOOL bdbenPWM)
866*53ee8cc1Swenshuai.xi {
867*53ee8cc1Swenshuai.xi     HAL_SUBBANK1;
868*53ee8cc1Swenshuai.xi 
869*53ee8cc1Swenshuai.xi     switch(index)
870*53ee8cc1Swenshuai.xi     {
871*53ee8cc1Swenshuai.xi         case E_PWM_CH0:
872*53ee8cc1Swenshuai.xi             HAL_PWM_WriteRegBit(REG_PWM0_ODDEVEN_SYNC, BITS(13:13, bdbenPWM), BMASK(13:13));
873*53ee8cc1Swenshuai.xi             break;
874*53ee8cc1Swenshuai.xi         case E_PWM_CH1:
875*53ee8cc1Swenshuai.xi             HAL_PWM_WriteRegBit(REG_PWM1_ODDEVEN_SYNC, BITS(13:13, bdbenPWM), BMASK(13:13));
876*53ee8cc1Swenshuai.xi             break;
877*53ee8cc1Swenshuai.xi         case E_PWM_CH2:
878*53ee8cc1Swenshuai.xi             HAL_PWM_WriteRegBit(REG_PWM2_ODDEVEN_SYNC, BITS(13:13, bdbenPWM), BMASK(13:13));
879*53ee8cc1Swenshuai.xi             break;
880*53ee8cc1Swenshuai.xi         case E_PWM_CH3:
881*53ee8cc1Swenshuai.xi             HAL_PWM_WriteRegBit(REG_PWM3_ODDEVEN_SYNC, BITS(13:13, bdbenPWM), BMASK(13:13));
882*53ee8cc1Swenshuai.xi             break;
883*53ee8cc1Swenshuai.xi         case E_PWM_CH4:
884*53ee8cc1Swenshuai.xi             HAL_PWM_WriteRegBit(REG_PWM4_ODDEVEN_SYNC, BITS(13:13, bdbenPWM), BMASK(13:13));
885*53ee8cc1Swenshuai.xi             break;
886*53ee8cc1Swenshuai.xi         case E_PWM_CH5:
887*53ee8cc1Swenshuai.xi             HAL_PWM_WriteRegBit(REG_PWM5_ODDEVEN_SYNC, BITS(13:13, bdbenPWM), BMASK(13:13));
888*53ee8cc1Swenshuai.xi             break;
889*53ee8cc1Swenshuai.xi 
890*53ee8cc1Swenshuai.xi         case E_PWM_CH6:
891*53ee8cc1Swenshuai.xi         case E_PWM_CH7:
892*53ee8cc1Swenshuai.xi         case E_PWM_CH8:
893*53ee8cc1Swenshuai.xi         case E_PWM_CH9:
894*53ee8cc1Swenshuai.xi 		default:
895*53ee8cc1Swenshuai.xi             printf("[ERROR] No Support PWM%d in Miami Platform\n", (int)index);
896*53ee8cc1Swenshuai.xi             UNUSED(bdbenPWM);
897*53ee8cc1Swenshuai.xi             break;
898*53ee8cc1Swenshuai.xi     }
899*53ee8cc1Swenshuai.xi 
900*53ee8cc1Swenshuai.xi     HAL_SUBBANK0;
901*53ee8cc1Swenshuai.xi }
902*53ee8cc1Swenshuai.xi 
903*53ee8cc1Swenshuai.xi ////////////////////////////////////////////////////////////////////////////////
904*53ee8cc1Swenshuai.xi /// @brief \b Function   \b Name : HAL_PWM_RstMux
905*53ee8cc1Swenshuai.xi /// @brief \b Function   \b Description : Set the Rst Mux of the specific pwm
906*53ee8cc1Swenshuai.xi /// @param <IN>          \b PWM_ChNum : Enum of the PWM CH
907*53ee8cc1Swenshuai.xi /// @param <IN>          \b MS_BOOL : 1 for Hsync; 0 for Vsync
908*53ee8cc1Swenshuai.xi /// @param <OUT>       \b None :
909*53ee8cc1Swenshuai.xi /// @param <RET>        \b None :
910*53ee8cc1Swenshuai.xi /// @param <GLOBAL>   \b None :
911*53ee8cc1Swenshuai.xi ////////////////////////////////////////////////////////////////////////////////
HAL_PWM_RstMux(PWM_ChNum index,MS_BOOL bMuxPWM)912*53ee8cc1Swenshuai.xi void HAL_PWM_RstMux(PWM_ChNum index, MS_BOOL bMuxPWM)
913*53ee8cc1Swenshuai.xi {
914*53ee8cc1Swenshuai.xi     HAL_SUBBANK1;
915*53ee8cc1Swenshuai.xi 
916*53ee8cc1Swenshuai.xi     switch(index)
917*53ee8cc1Swenshuai.xi     {
918*53ee8cc1Swenshuai.xi         case E_PWM_CH0:
919*53ee8cc1Swenshuai.xi             HAL_PWM_WriteRegBit(REG_RST_MUX0,BITS(15:15, bMuxPWM), BMASK(15:15));
920*53ee8cc1Swenshuai.xi             break;
921*53ee8cc1Swenshuai.xi         case E_PWM_CH1:
922*53ee8cc1Swenshuai.xi             HAL_PWM_WriteRegBit(REG_RST_MUX1,BITS(7:7, bMuxPWM), BMASK(7:7));
923*53ee8cc1Swenshuai.xi             break;
924*53ee8cc1Swenshuai.xi         case E_PWM_CH2:
925*53ee8cc1Swenshuai.xi             HAL_PWM_WriteRegBit(REG_RST_MUX2,BITS(15:15, bMuxPWM), BMASK(15:15));
926*53ee8cc1Swenshuai.xi             break;
927*53ee8cc1Swenshuai.xi         case E_PWM_CH3:
928*53ee8cc1Swenshuai.xi             HAL_PWM_WriteRegBit(REG_RST_MUX3,BITS(7:7, bMuxPWM), BMASK(7:7));
929*53ee8cc1Swenshuai.xi             break;
930*53ee8cc1Swenshuai.xi         case E_PWM_CH4:
931*53ee8cc1Swenshuai.xi             HAL_PWM_WriteRegBit(REG_RST_MUX4,BITS(15:15, bMuxPWM), BMASK(15:15));
932*53ee8cc1Swenshuai.xi             break;
933*53ee8cc1Swenshuai.xi         case E_PWM_CH5:
934*53ee8cc1Swenshuai.xi             HAL_PWM_WriteRegBit(REG_RST_MUX5,BITS(7:7, bMuxPWM), BMASK(7:7));
935*53ee8cc1Swenshuai.xi             break;
936*53ee8cc1Swenshuai.xi 
937*53ee8cc1Swenshuai.xi         case E_PWM_CH6:
938*53ee8cc1Swenshuai.xi         case E_PWM_CH7:
939*53ee8cc1Swenshuai.xi         case E_PWM_CH8:
940*53ee8cc1Swenshuai.xi         case E_PWM_CH9:
941*53ee8cc1Swenshuai.xi 		default:
942*53ee8cc1Swenshuai.xi 	        printf("[ERROR] No Support PWM%d in Miami Platform\n", (int)index);
943*53ee8cc1Swenshuai.xi             UNUSED(bMuxPWM);
944*53ee8cc1Swenshuai.xi             break;
945*53ee8cc1Swenshuai.xi     }
946*53ee8cc1Swenshuai.xi 
947*53ee8cc1Swenshuai.xi     HAL_SUBBANK0;
948*53ee8cc1Swenshuai.xi }
949*53ee8cc1Swenshuai.xi 
950*53ee8cc1Swenshuai.xi ////////////////////////////////////////////////////////////////////////////////
951*53ee8cc1Swenshuai.xi /// @brief \b Function   \b Name : HAL_PWM_RstCnt
952*53ee8cc1Swenshuai.xi /// @brief \b Function   \b Description : Set the Rst_Cnt of the specific pwm
953*53ee8cc1Swenshuai.xi /// @param <IN>          \b PWM_ChNum : Enum of the PWM CH
954*53ee8cc1Swenshuai.xi /// @param <IN>          \b MS_U8 : u8RstCntPWM
955*53ee8cc1Swenshuai.xi /// @param <OUT>       \b None :
956*53ee8cc1Swenshuai.xi /// @param <RET>        \b None :
957*53ee8cc1Swenshuai.xi /// @param <GLOBAL>   \b None :
958*53ee8cc1Swenshuai.xi ////////////////////////////////////////////////////////////////////////////////
HAL_PWM_RstCnt(PWM_ChNum index,MS_U8 u8RstCntPWM)959*53ee8cc1Swenshuai.xi void HAL_PWM_RstCnt(PWM_ChNum index, MS_U8 u8RstCntPWM)
960*53ee8cc1Swenshuai.xi {
961*53ee8cc1Swenshuai.xi 	if( u8RstCntPWM & 0x10 )
962*53ee8cc1Swenshuai.xi 	{
963*53ee8cc1Swenshuai.xi 		printf("PWM%d Reset Count is too large\n", index);
964*53ee8cc1Swenshuai.xi 	}
965*53ee8cc1Swenshuai.xi 
966*53ee8cc1Swenshuai.xi     HAL_SUBBANK1;
967*53ee8cc1Swenshuai.xi     /* the Hsync reset counter capability is restricted to ONLY 4-bit */
968*53ee8cc1Swenshuai.xi     switch(index)
969*53ee8cc1Swenshuai.xi     {
970*53ee8cc1Swenshuai.xi         case E_PWM_CH0:
971*53ee8cc1Swenshuai.xi 	        HAL_PWM_WriteRegBit(REG_HS_RST_CNT0, BITS(11:8, u8RstCntPWM), BMASK(11:8));
972*53ee8cc1Swenshuai.xi             break;
973*53ee8cc1Swenshuai.xi         case E_PWM_CH1:
974*53ee8cc1Swenshuai.xi             HAL_PWM_WriteRegBit(REG_HS_RST_CNT1, BITS(3:0, u8RstCntPWM), BMASK(3:0));
975*53ee8cc1Swenshuai.xi             break;
976*53ee8cc1Swenshuai.xi         case E_PWM_CH2:
977*53ee8cc1Swenshuai.xi             HAL_PWM_WriteRegBit(REG_HS_RST_CNT2, BITS(11:8, u8RstCntPWM), BMASK(11:8));
978*53ee8cc1Swenshuai.xi             break;
979*53ee8cc1Swenshuai.xi         case E_PWM_CH3:
980*53ee8cc1Swenshuai.xi             HAL_PWM_WriteRegBit(REG_HS_RST_CNT3, BITS(3:0, u8RstCntPWM), BMASK(3:0));
981*53ee8cc1Swenshuai.xi             break;
982*53ee8cc1Swenshuai.xi         case E_PWM_CH4:
983*53ee8cc1Swenshuai.xi             HAL_PWM_WriteRegBit(REG_HS_RST_CNT4, BITS(11:8, u8RstCntPWM), BMASK(11:8));
984*53ee8cc1Swenshuai.xi             break;
985*53ee8cc1Swenshuai.xi         case E_PWM_CH5:
986*53ee8cc1Swenshuai.xi             HAL_PWM_WriteRegBit(REG_HS_RST_CNT5, BITS(3:0, u8RstCntPWM), BMASK(3:0));
987*53ee8cc1Swenshuai.xi             break;
988*53ee8cc1Swenshuai.xi 
989*53ee8cc1Swenshuai.xi         case E_PWM_CH6:
990*53ee8cc1Swenshuai.xi         case E_PWM_CH7:
991*53ee8cc1Swenshuai.xi         case E_PWM_CH8:
992*53ee8cc1Swenshuai.xi         case E_PWM_CH9:
993*53ee8cc1Swenshuai.xi 		default:
994*53ee8cc1Swenshuai.xi 	        printf("[ERROR] No Support PWM%d in Miami Platform\n", (int)index);
995*53ee8cc1Swenshuai.xi             UNUSED(u8RstCntPWM);
996*53ee8cc1Swenshuai.xi             break;
997*53ee8cc1Swenshuai.xi     }
998*53ee8cc1Swenshuai.xi 
999*53ee8cc1Swenshuai.xi     HAL_SUBBANK0;
1000*53ee8cc1Swenshuai.xi }
1001*53ee8cc1Swenshuai.xi 
1002*53ee8cc1Swenshuai.xi ////////////////////////////////////////////////////////////////////////////////
1003*53ee8cc1Swenshuai.xi /// @brief \b Function   \b Name : HAL_PWM_BypassUnit
1004*53ee8cc1Swenshuai.xi /// @brief \b Function   \b Description : Set the Bypass Unit of the specific pwm
1005*53ee8cc1Swenshuai.xi /// @param <IN>          \b PWM_ChNum : Enum of the PWM CH
1006*53ee8cc1Swenshuai.xi /// @param <IN>          \b MS_BOOL : 1 for enable; 0 for disable
1007*53ee8cc1Swenshuai.xi /// @param <OUT>       \b None :
1008*53ee8cc1Swenshuai.xi /// @param <RET>        \b None :
1009*53ee8cc1Swenshuai.xi /// @param <GLOBAL>   \b None :
1010*53ee8cc1Swenshuai.xi ////////////////////////////////////////////////////////////////////////////////
HAL_PWM_BypassUnit(PWM_ChNum index,MS_BOOL bBypassPWM)1011*53ee8cc1Swenshuai.xi void HAL_PWM_BypassUnit(PWM_ChNum index, MS_BOOL bBypassPWM)
1012*53ee8cc1Swenshuai.xi {
1013*53ee8cc1Swenshuai.xi     HAL_SUBBANK1;
1014*53ee8cc1Swenshuai.xi 
1015*53ee8cc1Swenshuai.xi     //T2 ONLY
1016*53ee8cc1Swenshuai.xi 
1017*53ee8cc1Swenshuai.xi     switch(index)
1018*53ee8cc1Swenshuai.xi     {
1019*53ee8cc1Swenshuai.xi         case E_PWM_CH0:
1020*53ee8cc1Swenshuai.xi         case E_PWM_CH1:
1021*53ee8cc1Swenshuai.xi         case E_PWM_CH2:
1022*53ee8cc1Swenshuai.xi         case E_PWM_CH3:
1023*53ee8cc1Swenshuai.xi         case E_PWM_CH4:
1024*53ee8cc1Swenshuai.xi         case E_PWM_CH5:
1025*53ee8cc1Swenshuai.xi         case E_PWM_CH6:
1026*53ee8cc1Swenshuai.xi         case E_PWM_CH7:
1027*53ee8cc1Swenshuai.xi         case E_PWM_CH8:
1028*53ee8cc1Swenshuai.xi         case E_PWM_CH9:
1029*53ee8cc1Swenshuai.xi 		default:
1030*53ee8cc1Swenshuai.xi 			printf("[ERROR] No Support PWM%d in Miami Platform\n", (int)index);
1031*53ee8cc1Swenshuai.xi             UNUSED(bBypassPWM);
1032*53ee8cc1Swenshuai.xi             break;
1033*53ee8cc1Swenshuai.xi     }
1034*53ee8cc1Swenshuai.xi 
1035*53ee8cc1Swenshuai.xi     HAL_SUBBANK0;
1036*53ee8cc1Swenshuai.xi }
1037*53ee8cc1Swenshuai.xi 
1038*53ee8cc1Swenshuai.xi ////////////////////////////////////////////////////////////////////////////////
1039*53ee8cc1Swenshuai.xi /// @brief \b Function   \b Name : HAL_PWM01_CntMode
1040*53ee8cc1Swenshuai.xi /// @brief \b Function   \b Description :  Counter mode for PWM0 and PWM1
1041*53ee8cc1Swenshuai.xi /// @param <IN>          \b PWM_ChNum : Enum of the Counter mode
1042*53ee8cc1Swenshuai.xi /// @param <IN>          \b None :
1043*53ee8cc1Swenshuai.xi /// @param <OUT>       \b None :
1044*53ee8cc1Swenshuai.xi /// @param <RET>        \b PWM_Result :
1045*53ee8cc1Swenshuai.xi /// @param <GLOBAL>   \b None :
1046*53ee8cc1Swenshuai.xi /// @note                                                       \n
1047*53ee8cc1Swenshuai.xi ///     11: PWM1 donate internal divider to PWM0   \n
1048*53ee8cc1Swenshuai.xi ///     10: PWM0 donate internal divider to PWM1   \n
1049*53ee8cc1Swenshuai.xi ///     0x: Normal mode                                      \n
1050*53ee8cc1Swenshuai.xi ////////////////////////////////////////////////////////////////////////////////
HAL_PWM01_CntMode(PWM_CntMode CntMode)1051*53ee8cc1Swenshuai.xi MS_BOOL HAL_PWM01_CntMode(PWM_CntMode CntMode)
1052*53ee8cc1Swenshuai.xi {
1053*53ee8cc1Swenshuai.xi     MS_BOOL ret = FALSE;
1054*53ee8cc1Swenshuai.xi     //T2 ONLY
1055*53ee8cc1Swenshuai.xi     UNUSED(CntMode);
1056*53ee8cc1Swenshuai.xi     return ret;
1057*53ee8cc1Swenshuai.xi }
1058*53ee8cc1Swenshuai.xi 
1059*53ee8cc1Swenshuai.xi ////////////////////////////////////////////////////////////////////////////////
1060*53ee8cc1Swenshuai.xi /// @brief \b Function   \b Name : HAL_PWM23_CntMode
1061*53ee8cc1Swenshuai.xi /// @brief \b Function   \b Description :  Counter mode for PWM2 and PWM3
1062*53ee8cc1Swenshuai.xi /// @param <IN>          \b PWM_ChNum : Enum of the Counter mode
1063*53ee8cc1Swenshuai.xi /// @param <IN>          \b None :
1064*53ee8cc1Swenshuai.xi /// @param <OUT>       \b None :
1065*53ee8cc1Swenshuai.xi /// @param <RET>        \b PWM_Result :
1066*53ee8cc1Swenshuai.xi /// @param <GLOBAL>   \b None :
1067*53ee8cc1Swenshuai.xi /// @note                                                       \n
1068*53ee8cc1Swenshuai.xi ///     11: PWM3 donate internal divider to PWM2   \n
1069*53ee8cc1Swenshuai.xi ///     10: PWM2 donate internal divider to PWM3   \n
1070*53ee8cc1Swenshuai.xi ///     0x: Normal mode                                      \n
1071*53ee8cc1Swenshuai.xi ////////////////////////////////////////////////////////////////////////////////
HAL_PWM23_CntMode(PWM_CntMode CntMode)1072*53ee8cc1Swenshuai.xi MS_BOOL HAL_PWM23_CntMode(PWM_CntMode CntMode)
1073*53ee8cc1Swenshuai.xi {
1074*53ee8cc1Swenshuai.xi     MS_BOOL ret = FALSE;
1075*53ee8cc1Swenshuai.xi     //T2 ONLY
1076*53ee8cc1Swenshuai.xi     UNUSED(CntMode);
1077*53ee8cc1Swenshuai.xi     return ret;
1078*53ee8cc1Swenshuai.xi }
1079*53ee8cc1Swenshuai.xi 
1080*53ee8cc1Swenshuai.xi ////////////////////////////////////////////////////////////////////////////////
1081*53ee8cc1Swenshuai.xi /// @brief \b Function   \b Name : HAL_PWM67_CntMode
1082*53ee8cc1Swenshuai.xi /// @brief \b Function   \b Description :  Counter mode for PWM6 and PWM7
1083*53ee8cc1Swenshuai.xi /// @param <IN>          \b PWM_ChNum : Enum of the Counter mode
1084*53ee8cc1Swenshuai.xi /// @param <IN>          \b None :
1085*53ee8cc1Swenshuai.xi /// @param <OUT>       \b None :
1086*53ee8cc1Swenshuai.xi /// @param <RET>        \b PWM_Result :
1087*53ee8cc1Swenshuai.xi /// @param <GLOBAL>   \b None :
1088*53ee8cc1Swenshuai.xi /// @note                                                       \n
1089*53ee8cc1Swenshuai.xi ///     11: PWM7 donate internal divider to PWM6   \n
1090*53ee8cc1Swenshuai.xi ///     10: PWM6 donate internal divider to PWM7   \n
1091*53ee8cc1Swenshuai.xi ///     0x: Normal mode                                      \n
1092*53ee8cc1Swenshuai.xi ////////////////////////////////////////////////////////////////////////////////
HAL_PWM67_CntMode(PWM_CntMode CntMode)1093*53ee8cc1Swenshuai.xi MS_BOOL HAL_PWM67_CntMode(PWM_CntMode CntMode)
1094*53ee8cc1Swenshuai.xi {
1095*53ee8cc1Swenshuai.xi     MS_BOOL ret = FALSE;
1096*53ee8cc1Swenshuai.xi     //T2 ONLY
1097*53ee8cc1Swenshuai.xi     UNUSED(CntMode);
1098*53ee8cc1Swenshuai.xi     return ret;
1099*53ee8cc1Swenshuai.xi }
1100*53ee8cc1Swenshuai.xi 
1101*53ee8cc1Swenshuai.xi ////////////////////////////////////////////////////////////////////////////////
1102*53ee8cc1Swenshuai.xi /// @brief \b Function   \b Name : HAL_PWM_Shift
1103*53ee8cc1Swenshuai.xi /// @brief \b Function   \b Description : Set the Shift of the specific pwm
1104*53ee8cc1Swenshuai.xi /// @param <IN>          \b PWM_ChNum : Enum of the PWM CH
1105*53ee8cc1Swenshuai.xi /// @param <IN>          \b MS_U16 : the 18-bit shift value
1106*53ee8cc1Swenshuai.xi /// @param <OUT>       \b None :
1107*53ee8cc1Swenshuai.xi /// @param <RET>        \b None :
1108*53ee8cc1Swenshuai.xi /// @param <GLOBAL>   \b None :
1109*53ee8cc1Swenshuai.xi ////////////////////////////////////////////////////////////////////////////////
HAL_PWM_Shift(PWM_ChNum index,MS_U32 u32ShiftPWM)1110*53ee8cc1Swenshuai.xi MS_BOOL HAL_PWM_Shift(PWM_ChNum index, MS_U32 u32ShiftPWM)
1111*53ee8cc1Swenshuai.xi {
1112*53ee8cc1Swenshuai.xi     MS_U16 Shift_L, Shift_H;
1113*53ee8cc1Swenshuai.xi 
1114*53ee8cc1Swenshuai.xi     Shift_L = (MS_U16)(u32ShiftPWM & 0xFFFF);
1115*53ee8cc1Swenshuai.xi     Shift_H = (MS_U16)(u32ShiftPWM >> 16);
1116*53ee8cc1Swenshuai.xi 
1117*53ee8cc1Swenshuai.xi     HAL_SUBBANK1;
1118*53ee8cc1Swenshuai.xi 
1119*53ee8cc1Swenshuai.xi     switch(index)
1120*53ee8cc1Swenshuai.xi     {
1121*53ee8cc1Swenshuai.xi         case E_PWM_CH0:
1122*53ee8cc1Swenshuai.xi             HAL_PWM_Write2Byte(REG_PWM0_SHIFT_L, Shift_L);
1123*53ee8cc1Swenshuai.xi             HAL_PWM_Write2Byte(REG_PWM0_SHIFT_H, Shift_H);
1124*53ee8cc1Swenshuai.xi             break;
1125*53ee8cc1Swenshuai.xi         case E_PWM_CH1:
1126*53ee8cc1Swenshuai.xi             HAL_PWM_Write2Byte(REG_PWM1_SHIFT_L, Shift_L);
1127*53ee8cc1Swenshuai.xi             HAL_PWM_Write2Byte(REG_PWM1_SHIFT_H, Shift_H);
1128*53ee8cc1Swenshuai.xi             break;
1129*53ee8cc1Swenshuai.xi         case E_PWM_CH2:
1130*53ee8cc1Swenshuai.xi             HAL_PWM_Write2Byte(REG_PWM2_SHIFT_L, Shift_L);
1131*53ee8cc1Swenshuai.xi             HAL_PWM_Write2Byte(REG_PWM2_SHIFT_H, Shift_H);
1132*53ee8cc1Swenshuai.xi             break;
1133*53ee8cc1Swenshuai.xi         case E_PWM_CH3:
1134*53ee8cc1Swenshuai.xi             HAL_PWM_Write2Byte(REG_PWM3_SHIFT_L, Shift_L);
1135*53ee8cc1Swenshuai.xi             HAL_PWM_Write2Byte(REG_PWM3_SHIFT_H, Shift_H);
1136*53ee8cc1Swenshuai.xi             break;
1137*53ee8cc1Swenshuai.xi         case E_PWM_CH4:
1138*53ee8cc1Swenshuai.xi             HAL_PWM_Write2Byte(REG_PWM4_SHIFT_L, Shift_L);
1139*53ee8cc1Swenshuai.xi             HAL_PWM_Write2Byte(REG_PWM4_SHIFT_H, Shift_H);
1140*53ee8cc1Swenshuai.xi             break;
1141*53ee8cc1Swenshuai.xi         case E_PWM_CH5:
1142*53ee8cc1Swenshuai.xi             HAL_PWM_Write2Byte(REG_PWM5_SHIFT_L, Shift_L);
1143*53ee8cc1Swenshuai.xi             HAL_PWM_Write2Byte(REG_PWM5_SHIFT_H, Shift_H);
1144*53ee8cc1Swenshuai.xi             break;
1145*53ee8cc1Swenshuai.xi 
1146*53ee8cc1Swenshuai.xi         case E_PWM_CH6:
1147*53ee8cc1Swenshuai.xi         case E_PWM_CH7:
1148*53ee8cc1Swenshuai.xi         case E_PWM_CH8:
1149*53ee8cc1Swenshuai.xi         case E_PWM_CH9:
1150*53ee8cc1Swenshuai.xi 		default:
1151*53ee8cc1Swenshuai.xi 			printf("[ERROR] No Support PWM%d in Miami Platform\n", (int)index);
1152*53ee8cc1Swenshuai.xi             UNUSED(Shift_L);UNUSED(Shift_H);
1153*53ee8cc1Swenshuai.xi             break;
1154*53ee8cc1Swenshuai.xi     }
1155*53ee8cc1Swenshuai.xi 
1156*53ee8cc1Swenshuai.xi     HAL_SUBBANK0;
1157*53ee8cc1Swenshuai.xi 
1158*53ee8cc1Swenshuai.xi     return TRUE;
1159*53ee8cc1Swenshuai.xi }
1160*53ee8cc1Swenshuai.xi 
1161*53ee8cc1Swenshuai.xi 
HAL_PWM_Nvsync(PWM_ChNum index,MS_BOOL bNvsPWM)1162*53ee8cc1Swenshuai.xi void HAL_PWM_Nvsync(PWM_ChNum index, MS_BOOL bNvsPWM)
1163*53ee8cc1Swenshuai.xi     {
1164*53ee8cc1Swenshuai.xi 
1165*53ee8cc1Swenshuai.xi         HAL_SUBBANK1;
1166*53ee8cc1Swenshuai.xi 
1167*53ee8cc1Swenshuai.xi         switch(index)
1168*53ee8cc1Swenshuai.xi         {
1169*53ee8cc1Swenshuai.xi             case E_PWM_CH0:
1170*53ee8cc1Swenshuai.xi                 HAL_PWM_WriteRegBit(REG_PWM0_NVS, BITS(0:0, bNvsPWM), BMASK(0:0));
1171*53ee8cc1Swenshuai.xi                 break;
1172*53ee8cc1Swenshuai.xi             case E_PWM_CH1:
1173*53ee8cc1Swenshuai.xi                 HAL_PWM_WriteRegBit(REG_PWM1_NVS, BITS(1:1, bNvsPWM), BMASK(1:1));
1174*53ee8cc1Swenshuai.xi                 break;
1175*53ee8cc1Swenshuai.xi             case E_PWM_CH2:
1176*53ee8cc1Swenshuai.xi                 HAL_PWM_WriteRegBit(REG_PWM2_NVS, BITS(2:2, bNvsPWM), BMASK(2:2));
1177*53ee8cc1Swenshuai.xi                 break;
1178*53ee8cc1Swenshuai.xi             case E_PWM_CH3:
1179*53ee8cc1Swenshuai.xi                 HAL_PWM_WriteRegBit(REG_PWM3_NVS, BITS(3:3, bNvsPWM), BMASK(3:3));
1180*53ee8cc1Swenshuai.xi                 break;
1181*53ee8cc1Swenshuai.xi             case E_PWM_CH4:
1182*53ee8cc1Swenshuai.xi                 HAL_PWM_WriteRegBit(REG_PWM4_NVS, BITS(4:4, bNvsPWM), BMASK(4:4));
1183*53ee8cc1Swenshuai.xi                 break;
1184*53ee8cc1Swenshuai.xi             case E_PWM_CH5:
1185*53ee8cc1Swenshuai.xi                 HAL_PWM_WriteRegBit(REG_PWM5_NVS, BITS(5:5, bNvsPWM), BMASK(5:5));
1186*53ee8cc1Swenshuai.xi                 break;
1187*53ee8cc1Swenshuai.xi 
1188*53ee8cc1Swenshuai.xi             case E_PWM_CH6:
1189*53ee8cc1Swenshuai.xi             case E_PWM_CH7:
1190*53ee8cc1Swenshuai.xi             case E_PWM_CH8:
1191*53ee8cc1Swenshuai.xi             case E_PWM_CH9:
1192*53ee8cc1Swenshuai.xi             default:
1193*53ee8cc1Swenshuai.xi                 printf("[ERROR] No Support PWM%d in Miami Platform\n", (int)index);
1194*53ee8cc1Swenshuai.xi                 UNUSED(bNvsPWM);
1195*53ee8cc1Swenshuai.xi                 break;
1196*53ee8cc1Swenshuai.xi         }
1197*53ee8cc1Swenshuai.xi 
1198*53ee8cc1Swenshuai.xi         HAL_SUBBANK0;
1199*53ee8cc1Swenshuai.xi     }
1200*53ee8cc1Swenshuai.xi 
HAL_PWM_Align(PWM_ChNum index,MS_BOOL bAliPWM)1201*53ee8cc1Swenshuai.xi void HAL_PWM_Align(PWM_ChNum index, MS_BOOL bAliPWM)
1202*53ee8cc1Swenshuai.xi     {
1203*53ee8cc1Swenshuai.xi 
1204*53ee8cc1Swenshuai.xi         HAL_SUBBANK1;
1205*53ee8cc1Swenshuai.xi 
1206*53ee8cc1Swenshuai.xi         switch(index)
1207*53ee8cc1Swenshuai.xi         {
1208*53ee8cc1Swenshuai.xi             case E_PWM_CH0:
1209*53ee8cc1Swenshuai.xi                 HAL_PWM_WriteRegBit(REG_PWM0_Align, BITS(0:0, bAliPWM), BMASK(0:0));
1210*53ee8cc1Swenshuai.xi                 break;
1211*53ee8cc1Swenshuai.xi             case E_PWM_CH1:
1212*53ee8cc1Swenshuai.xi                 HAL_PWM_WriteRegBit(REG_PWM1_Align, BITS(1:1, bAliPWM), BMASK(1:1));
1213*53ee8cc1Swenshuai.xi                 break;
1214*53ee8cc1Swenshuai.xi             case E_PWM_CH2:
1215*53ee8cc1Swenshuai.xi                 HAL_PWM_WriteRegBit(REG_PWM2_Align, BITS(2:2, bAliPWM), BMASK(2:2));
1216*53ee8cc1Swenshuai.xi                 break;
1217*53ee8cc1Swenshuai.xi             case E_PWM_CH3:
1218*53ee8cc1Swenshuai.xi                 HAL_PWM_WriteRegBit(REG_PWM3_Align, BITS(3:3, bAliPWM), BMASK(3:3));
1219*53ee8cc1Swenshuai.xi                 break;
1220*53ee8cc1Swenshuai.xi             case E_PWM_CH4:
1221*53ee8cc1Swenshuai.xi                 HAL_PWM_WriteRegBit(REG_PWM4_Align, BITS(4:4, bAliPWM), BMASK(4:4));
1222*53ee8cc1Swenshuai.xi                 break;
1223*53ee8cc1Swenshuai.xi             case E_PWM_CH5:
1224*53ee8cc1Swenshuai.xi                 HAL_PWM_WriteRegBit(REG_PWM5_Align, BITS(5:5, bAliPWM), BMASK(5:5));
1225*53ee8cc1Swenshuai.xi                 break;
1226*53ee8cc1Swenshuai.xi 
1227*53ee8cc1Swenshuai.xi             case E_PWM_CH6:
1228*53ee8cc1Swenshuai.xi             case E_PWM_CH7:
1229*53ee8cc1Swenshuai.xi             case E_PWM_CH8:
1230*53ee8cc1Swenshuai.xi             case E_PWM_CH9:
1231*53ee8cc1Swenshuai.xi             default:
1232*53ee8cc1Swenshuai.xi                 printf("[ERROR] No Support PWM%d in Miami Platform\n", (int)index);
1233*53ee8cc1Swenshuai.xi                 UNUSED(bAliPWM);
1234*53ee8cc1Swenshuai.xi                 break;
1235*53ee8cc1Swenshuai.xi         }
1236*53ee8cc1Swenshuai.xi 
1237*53ee8cc1Swenshuai.xi         HAL_SUBBANK0;
1238*53ee8cc1Swenshuai.xi     }
1239*53ee8cc1Swenshuai.xi 
1240*53ee8cc1Swenshuai.xi PWM_3D_RegisterOffset g_ArrayPWM3D_RegisterOffset[PWM_Num][MAX_3DPWM_NUM] =
1241*53ee8cc1Swenshuai.xi {
1242*53ee8cc1Swenshuai.xi     { //PWM0
1243*53ee8cc1Swenshuai.xi         {//PWM0_Waveform_0
1244*53ee8cc1Swenshuai.xi             {0,  0}, //PWM0_Waveform_0_Shift  ==> use: HAL_PWM_Shift()
1245*53ee8cc1Swenshuai.xi             {0,  0}, //PWM0_Waveform_0_duty  ==> use: HAL_PWM_DutyCycle()
1246*53ee8cc1Swenshuai.xi         },
1247*53ee8cc1Swenshuai.xi         {//PWM0_Waveform_1
1248*53ee8cc1Swenshuai.xi             {REG_PWM0_HIT_CNT_ST,    16}, //PWM0_Waveform_1_Shift
1249*53ee8cc1Swenshuai.xi             {REG_PWM0_HIT_CNT_END,   16}, //PWM0_Waveform_1_duty
1250*53ee8cc1Swenshuai.xi         },
1251*53ee8cc1Swenshuai.xi         {//PWM0_Waveform_2
1252*53ee8cc1Swenshuai.xi             {REG_PWM0_HIT_CNT_ST2,    16}, //PWM0_Waveform_2_Shift
1253*53ee8cc1Swenshuai.xi             {REG_PWM0_HIT_CNT_END2,   16}, //PWM0_Waveform_2_duty
1254*53ee8cc1Swenshuai.xi         },
1255*53ee8cc1Swenshuai.xi         {//PWM0_Waveform_3
1256*53ee8cc1Swenshuai.xi             {REG_PWM0_SHIFT4,    16}, //PWM0_Waveform_3_Shift
1257*53ee8cc1Swenshuai.xi             {REG_PWM0_DUTY4,   16}, //PWM0_Waveform_3_duty
1258*53ee8cc1Swenshuai.xi         },
1259*53ee8cc1Swenshuai.xi     },
1260*53ee8cc1Swenshuai.xi 
1261*53ee8cc1Swenshuai.xi     { //PWM1
1262*53ee8cc1Swenshuai.xi         {//PWM1_Waveform_0
1263*53ee8cc1Swenshuai.xi             {0,  0}, //PWM1_Waveform_0_Shift  ==> use: HAL_PWM_Shift()
1264*53ee8cc1Swenshuai.xi             {0,  0}, //PWM1_Waveform_0_duty  ==> use: HAL_PWM_DutyCycle()
1265*53ee8cc1Swenshuai.xi         },
1266*53ee8cc1Swenshuai.xi         {//PWM1_Waveform_1
1267*53ee8cc1Swenshuai.xi             {REG_PWM1_HIT_CNT_ST,    16}, //PWM1_Waveform_1_Shift
1268*53ee8cc1Swenshuai.xi             {REG_PWM1_HIT_CNT_END,   16}, //PWM1_Waveform_1_duty
1269*53ee8cc1Swenshuai.xi         },
1270*53ee8cc1Swenshuai.xi         {//PWM1_Waveform_2
1271*53ee8cc1Swenshuai.xi             {REG_PWM1_HIT_CNT_ST2,    16}, //PWM1_Waveform_2_Shift
1272*53ee8cc1Swenshuai.xi             {REG_PWM1_HIT_CNT_END2,   16}, //PWM1_Waveform_2_duty
1273*53ee8cc1Swenshuai.xi         },
1274*53ee8cc1Swenshuai.xi         {//PWM1_Waveform_3
1275*53ee8cc1Swenshuai.xi             {REG_PWM1_SHIFT4,    16}, //PWM1_Waveform_3_Shift
1276*53ee8cc1Swenshuai.xi             {REG_PWM1_DUTY4,   16}, //PWM1_Waveform_3_duty
1277*53ee8cc1Swenshuai.xi         },
1278*53ee8cc1Swenshuai.xi     },
1279*53ee8cc1Swenshuai.xi };
1280*53ee8cc1Swenshuai.xi 
HAL_PWM_IsSupport3D(PWM_ChNum index)1281*53ee8cc1Swenshuai.xi MS_BOOL HAL_PWM_IsSupport3D(PWM_ChNum index)
1282*53ee8cc1Swenshuai.xi {
1283*53ee8cc1Swenshuai.xi     //Only PWM0 & PWM1 Support 3D Function
1284*53ee8cc1Swenshuai.xi     switch (index)
1285*53ee8cc1Swenshuai.xi     {
1286*53ee8cc1Swenshuai.xi         case E_PWM_CH0:
1287*53ee8cc1Swenshuai.xi         case E_PWM_CH1:
1288*53ee8cc1Swenshuai.xi             return TRUE;
1289*53ee8cc1Swenshuai.xi 
1290*53ee8cc1Swenshuai.xi         default:
1291*53ee8cc1Swenshuai.xi             return FALSE;
1292*53ee8cc1Swenshuai.xi     }
1293*53ee8cc1Swenshuai.xi }
1294*53ee8cc1Swenshuai.xi 
HAL_PWM_SetMultiDiff(MS_BOOL bEnable)1295*53ee8cc1Swenshuai.xi void HAL_PWM_SetMultiDiff(MS_BOOL bEnable)
1296*53ee8cc1Swenshuai.xi {
1297*53ee8cc1Swenshuai.xi     HAL_SUBBANK1;
1298*53ee8cc1Swenshuai.xi     HAL_PWM_WriteRegBit(REG_PWM_MULTI_DIFF, PWM_MULTI_DIEF_EN, bEnable);
1299*53ee8cc1Swenshuai.xi     HAL_SUBBANK0;
1300*53ee8cc1Swenshuai.xi }
1301*53ee8cc1Swenshuai.xi 
HAL_PWM_Set3D_DiffWaveform(PWM_ChNum index,MS_U8 u8WaveformIndex,MS_U32 u32Shift,MS_U32 u32Duty)1302*53ee8cc1Swenshuai.xi MS_BOOL HAL_PWM_Set3D_DiffWaveform(PWM_ChNum index, MS_U8 u8WaveformIndex, MS_U32 u32Shift, MS_U32 u32Duty)
1303*53ee8cc1Swenshuai.xi {
1304*53ee8cc1Swenshuai.xi     MS_BOOL bReturn = TRUE;
1305*53ee8cc1Swenshuai.xi     PWM_3D_RegisterOffset *pReigsterOffset = (PWM_3D_RegisterOffset *)&g_ArrayPWM3D_RegisterOffset[index][u8WaveformIndex];
1306*53ee8cc1Swenshuai.xi 
1307*53ee8cc1Swenshuai.xi     if (u8WaveformIndex == 0)
1308*53ee8cc1Swenshuai.xi     {
1309*53ee8cc1Swenshuai.xi         bReturn &= HAL_PWM_Shift(index, u32Shift);
1310*53ee8cc1Swenshuai.xi         HAL_PWM_DutyCycle(index, u32Duty);
1311*53ee8cc1Swenshuai.xi     }
1312*53ee8cc1Swenshuai.xi     else
1313*53ee8cc1Swenshuai.xi     {
1314*53ee8cc1Swenshuai.xi         HAL_SUBBANK1;
1315*53ee8cc1Swenshuai.xi         bReturn &= HAL_PWM_WriteNumberByte(pReigsterOffset->regShift.u32RegOffset, u32Shift, pReigsterOffset->regShift.u8NumBit);
1316*53ee8cc1Swenshuai.xi         bReturn &= HAL_PWM_WriteNumberByte(pReigsterOffset->regDuty.u32RegOffset, u32Duty, pReigsterOffset->regDuty.u8NumBit);
1317*53ee8cc1Swenshuai.xi         HAL_SUBBANK0
1318*53ee8cc1Swenshuai.xi     }
1319*53ee8cc1Swenshuai.xi 
1320*53ee8cc1Swenshuai.xi     return bReturn;
1321*53ee8cc1Swenshuai.xi }
1322*53ee8cc1Swenshuai.xi 
1323*53ee8cc1Swenshuai.xi //---------------------------PM Base--------------------------------//
1324*53ee8cc1Swenshuai.xi 
HAL_PM_PWM_Enable(void)1325*53ee8cc1Swenshuai.xi void HAL_PM_PWM_Enable(void)
1326*53ee8cc1Swenshuai.xi {
1327*53ee8cc1Swenshuai.xi     HAL_PM_WriteRegBit(REG_PM_PWM0_IS_GPIO, BITS(5:5, 0), BMASK(5:5));
1328*53ee8cc1Swenshuai.xi     HAL_PM_WriteRegBit(reg_pwm_as_chip_config, BITS(0:0, 0), BMASK(0:0));//reg_pwm_pm_is_PWM
1329*53ee8cc1Swenshuai.xi }
1330*53ee8cc1Swenshuai.xi 
HAL_PM_PWM_Period(MS_U16 u16PeriodPWM)1331*53ee8cc1Swenshuai.xi void HAL_PM_PWM_Period(MS_U16 u16PeriodPWM)
1332*53ee8cc1Swenshuai.xi {
1333*53ee8cc1Swenshuai.xi     MS_U16  Period;
1334*53ee8cc1Swenshuai.xi     Period = u16PeriodPWM;
1335*53ee8cc1Swenshuai.xi     HAL_PM_Write2Byte(REG_PM_PWM0_PERIOD, Period);
1336*53ee8cc1Swenshuai.xi }
1337*53ee8cc1Swenshuai.xi 
HAL_PM_PWM_DutyCycle(MS_U16 u16DutyPWM)1338*53ee8cc1Swenshuai.xi void HAL_PM_PWM_DutyCycle(MS_U16 u16DutyPWM)
1339*53ee8cc1Swenshuai.xi {
1340*53ee8cc1Swenshuai.xi     MS_U16  Duty;
1341*53ee8cc1Swenshuai.xi     Duty =u16DutyPWM;
1342*53ee8cc1Swenshuai.xi     HAL_PM_Write2Byte(REG_PM_PWM0_DUTY, Duty);
1343*53ee8cc1Swenshuai.xi }
1344*53ee8cc1Swenshuai.xi 
HAL_PM_PWM_Div(MS_U8 u8DivPWM)1345*53ee8cc1Swenshuai.xi void HAL_PM_PWM_Div(MS_U8 u8DivPWM)
1346*53ee8cc1Swenshuai.xi {
1347*53ee8cc1Swenshuai.xi     MS_U8 Div;
1348*53ee8cc1Swenshuai.xi     Div = u8DivPWM;
1349*53ee8cc1Swenshuai.xi     HAL_PM_Write2Byte(REG_PM_PWM0_DIV, Div);
1350*53ee8cc1Swenshuai.xi }
1351*53ee8cc1Swenshuai.xi 
HAL_PM_PWM_Polarity(MS_BOOL bPolPWM)1352*53ee8cc1Swenshuai.xi void HAL_PM_PWM_Polarity(MS_BOOL bPolPWM)
1353*53ee8cc1Swenshuai.xi {
1354*53ee8cc1Swenshuai.xi     HAL_PM_WriteRegBit(REG_PM_PWM0_PORARITY, BITS(0:0, bPolPWM), BMASK(0:0));
1355*53ee8cc1Swenshuai.xi }
1356*53ee8cc1Swenshuai.xi 
HAL_PM_PWM_DBen(MS_BOOL bdbenPWM)1357*53ee8cc1Swenshuai.xi void HAL_PM_PWM_DBen(MS_BOOL bdbenPWM)
1358*53ee8cc1Swenshuai.xi {
1359*53ee8cc1Swenshuai.xi     HAL_PM_WriteRegBit(REG_PM_PWM0_DBEN, BITS(1:1, bdbenPWM), BMASK(1:1));
1360*53ee8cc1Swenshuai.xi }
1361*53ee8cc1Swenshuai.xi 
1362*53ee8cc1Swenshuai.xi ////////////////////////////////////////////////////////////////////////////////
1363*53ee8cc1Swenshuai.xi /// @brief \b Function   \b Name : HAL_PWM_INV_3D_Flag
1364*53ee8cc1Swenshuai.xi /// @brief \b Function   \b Description : Set Inverse 3D flag
1365*53ee8cc1Swenshuai.xi /// @param <IN>          \b MS_BOOL : 1 for Enable; 0 for Disable
1366*53ee8cc1Swenshuai.xi ////////////////////////////////////////////////////////////////////////////////
HAL_PWM_INV_3D_Flag(MS_BOOL bInvPWM)1367*53ee8cc1Swenshuai.xi MS_BOOL HAL_PWM_INV_3D_Flag(MS_BOOL bInvPWM)
1368*53ee8cc1Swenshuai.xi {
1369*53ee8cc1Swenshuai.xi 	MS_BOOL ret = FALSE;
1370*53ee8cc1Swenshuai.xi     HAL_SUBBANK1;
1371*53ee8cc1Swenshuai.xi     HAL_PM_WriteRegBit(REG_INV_3D_FLAG,BITS(15:15,bInvPWM),BMASK(15:15));
1372*53ee8cc1Swenshuai.xi     ret = true;
1373*53ee8cc1Swenshuai.xi     HAL_SUBBANK0;
1374*53ee8cc1Swenshuai.xi     return ret;
1375*53ee8cc1Swenshuai.xi }
1376*53ee8cc1Swenshuai.xi 
1377