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Searched refs:REG_PWM2_NVS (Results 1 – 22 of 22) sorted by relevance

/utopia/UTPA2-700.0.x/modules/pwm/hal/macan/pwm/
H A DregPWM.h298 #define REG_PWM2_NVS (0x34) //bit2 macro
H A DhalPWM.c1175 HAL_PWM_WriteRegBit(REG_PWM2_NVS,BITS(2:2,bNvsPWM),BMASK(2:2)); in HAL_PWM_Nvsync()
/utopia/UTPA2-700.0.x/modules/pwm/hal/messi/pwm/
H A DregPWM.h298 #define REG_PWM2_NVS (0x34) //bit2 macro
H A DhalPWM.c1500 HAL_PWM_WriteRegBit(REG_PWM2_NVS,BITS(2:2,bNvsPWM),BMASK(2:2)); in HAL_PWM_Nvsync()
/utopia/UTPA2-700.0.x/modules/pwm/hal/mooney/pwm/
H A DregPWM.h298 #define REG_PWM2_NVS (0x34) //bit2 macro
H A DhalPWM.c1492 HAL_PWM_WriteRegBit(REG_PWM2_NVS,BITS(2:2,bNvsPWM),BMASK(2:2)); in HAL_PWM_Nvsync()
/utopia/UTPA2-700.0.x/modules/pwm/hal/mainz/pwm/
H A DregPWM.h298 #define REG_PWM2_NVS (0x34) //bit2 macro
H A DhalPWM.c1495 HAL_PWM_WriteRegBit(REG_PWM2_NVS,BITS(2:2,bNvsPWM),BMASK(2:2)); in HAL_PWM_Nvsync()
/utopia/UTPA2-700.0.x/modules/pwm/hal/manhattan/pwm/
H A DregPWM.h298 #define REG_PWM2_NVS (0x34) //bit2 macro
H A DhalPWM.c1492 HAL_PWM_WriteRegBit(REG_PWM2_NVS,BITS(2:2,bNvsPWM),BMASK(2:2)); in HAL_PWM_Nvsync()
/utopia/UTPA2-700.0.x/modules/pwm/hal/maxim/pwm/
H A DregPWM.h307 #define REG_PWM2_NVS (0x34) //bit2 macro
H A DhalPWM.c1492 HAL_PWM_WriteRegBit(REG_PWM2_NVS,BITS(2:2,bNvsPWM),BMASK(2:2)); in HAL_PWM_Nvsync()
/utopia/UTPA2-700.0.x/modules/pwm/hal/mustang/pwm/
H A DregPWM.h290 #define REG_PWM2_NVS (0x34) //bit2 macro
H A DhalPWM.c1181 HAL_PWM_WriteRegBit(REG_PWM2_NVS, BITS(2:2, bNvsPWM), BMASK(2:2)); in HAL_PWM_Nvsync()
/utopia/UTPA2-700.0.x/modules/pwm/hal/M7621/pwm/
H A DregPWM.h307 #define REG_PWM2_NVS (0x34) //bit2 macro
H A DhalPWM.c1492 HAL_PWM_WriteRegBit(REG_PWM2_NVS,BITS(2:2,bNvsPWM),BMASK(2:2)); in HAL_PWM_Nvsync()
/utopia/UTPA2-700.0.x/modules/pwm/hal/M7821/pwm/
H A DregPWM.h307 #define REG_PWM2_NVS (0x34) //bit2 macro
H A DhalPWM.c1493 HAL_PWM_WriteRegBit(REG_PWM2_NVS,BITS(2:2,bNvsPWM),BMASK(2:2)); in HAL_PWM_Nvsync()
/utopia/UTPA2-700.0.x/modules/pwm/hal/maldives/pwm/
H A DregPWM.h286 #define REG_PWM2_NVS (0x34) //bit2 macro
H A DhalPWM.c1176 HAL_PWM_WriteRegBit(REG_PWM2_NVS, BITS(2:2, bNvsPWM), BMASK(2:2)); in HAL_PWM_Nvsync()
/utopia/UTPA2-700.0.x/modules/pwm/hal/maserati/pwm/
H A DregPWM.h307 #define REG_PWM2_NVS (0x34) //bit2 macro
H A DhalPWM.c1493 HAL_PWM_WriteRegBit(REG_PWM2_NVS,BITS(2:2,bNvsPWM),BMASK(2:2)); in HAL_PWM_Nvsync()