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Searched refs:REG_ADC_CHIPTOP_BASE (Results 1 – 25 of 35) sorted by relevance

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/utopia/UTPA2-700.0.x/modules/xc/hal/messi/xc/include/
H A Dhwreg_adc_atop.h374 #define REG_ADC_CHIPTOP_12_L (REG_ADC_CHIPTOP_BASE + 0x24)
375 #define REG_ADC_CHIPTOP_12_H (REG_ADC_CHIPTOP_BASE + 0x25)
H A Dmhal_xc_chip_config.h488 #define REG_ADC_CHIPTOP_BASE 0x101E00UL // 0x1E00 - 0x1EFF macro
/utopia/UTPA2-700.0.x/modules/xc/hal/maldives/xc/include/
H A Dxc_Analog_Reg.h252 #define L_BK_ADC_CHIPTOP(x) BK_REG_L(REG_ADC_CHIPTOP_BASE, x)
253 #define H_BK_ADC_CHIPTOP(x) BK_REG_H(REG_ADC_CHIPTOP_BASE, x)
H A Dhwreg_adc_atop.h625 #define REG_ADC_CHIPTOP_12_L (REG_ADC_CHIPTOP_BASE + 0x24)
626 #define REG_ADC_CHIPTOP_12_H (REG_ADC_CHIPTOP_BASE + 0x25)
H A Dmhal_xc_chip_config.h395 #define REG_ADC_CHIPTOP_BASE 0x101E00 // 0x1E00 - 0x1EFF macro
/utopia/UTPA2-700.0.x/modules/xc/hal/mainz/xc/include/
H A Dhwreg_adc_atop.h374 #define REG_ADC_CHIPTOP_12_L (REG_ADC_CHIPTOP_BASE + 0x24)
375 #define REG_ADC_CHIPTOP_12_H (REG_ADC_CHIPTOP_BASE + 0x25)
H A Dmhal_xc_chip_config.h490 #define REG_ADC_CHIPTOP_BASE 0x101E00UL // 0x1E00 - 0x1EFF macro
/utopia/UTPA2-700.0.x/modules/xc/hal/manhattan/xc/include/
H A Dhwreg_adc_atop.h374 #define REG_ADC_CHIPTOP_12_L (REG_ADC_CHIPTOP_BASE + 0x24)
375 #define REG_ADC_CHIPTOP_12_H (REG_ADC_CHIPTOP_BASE + 0x25)
H A Dmhal_xc_chip_config.h530 #define REG_ADC_CHIPTOP_BASE 0x101E00UL // 0x1E00 - 0x1EFF macro
/utopia/UTPA2-700.0.x/modules/xc/hal/mustang/xc/include/
H A Dxc_Analog_Reg.h252 #define L_BK_ADC_CHIPTOP(x) BK_REG_L(REG_ADC_CHIPTOP_BASE, x)
253 #define H_BK_ADC_CHIPTOP(x) BK_REG_H(REG_ADC_CHIPTOP_BASE, x)
H A Dhwreg_adc_atop.h625 #define REG_ADC_CHIPTOP_12_L (REG_ADC_CHIPTOP_BASE + 0x24)
626 #define REG_ADC_CHIPTOP_12_H (REG_ADC_CHIPTOP_BASE + 0x25)
H A Dmhal_xc_chip_config.h395 #define REG_ADC_CHIPTOP_BASE 0x101E00 // 0x1E00 - 0x1EFF macro
/utopia/UTPA2-700.0.x/modules/xc/hal/mooney/xc/include/
H A Dhwreg_adc_atop.h374 #define REG_ADC_CHIPTOP_12_L (REG_ADC_CHIPTOP_BASE + 0x24)
375 #define REG_ADC_CHIPTOP_12_H (REG_ADC_CHIPTOP_BASE + 0x25)
H A Dmhal_xc_chip_config.h471 #define REG_ADC_CHIPTOP_BASE 0x101E00UL // 0x1E00 - 0x1EFF macro
/utopia/UTPA2-700.0.x/modules/xc/hal/macan/xc/include/
H A Dhwreg_adc_atop.h625 #define REG_ADC_CHIPTOP_12_L (REG_ADC_CHIPTOP_BASE + 0x24)
626 #define REG_ADC_CHIPTOP_12_H (REG_ADC_CHIPTOP_BASE + 0x25)
H A Dmhal_xc_chip_config.h517 #define REG_ADC_CHIPTOP_BASE 0x101E00UL // 0x1E00 - 0x1EFF macro
/utopia/UTPA2-700.0.x/modules/xc/hal/M7821/xc/include/
H A Dhwreg_adc_atop.h625 #define REG_ADC_CHIPTOP_12_L (REG_ADC_CHIPTOP_BASE + 0x24)
626 #define REG_ADC_CHIPTOP_12_H (REG_ADC_CHIPTOP_BASE + 0x25)
H A Dmhal_xc_chip_config.h575 #define REG_ADC_CHIPTOP_BASE 0x101E00UL // 0x1E00 - 0x1EFF macro
/utopia/UTPA2-700.0.x/modules/xc/hal/maxim/xc/include/
H A Dhwreg_adc_atop.h625 #define REG_ADC_CHIPTOP_12_L (REG_ADC_CHIPTOP_BASE + 0x24)
626 #define REG_ADC_CHIPTOP_12_H (REG_ADC_CHIPTOP_BASE + 0x25)
H A Dmhal_xc_chip_config.h566 #define REG_ADC_CHIPTOP_BASE 0x101E00UL // 0x1E00 - 0x1EFF macro
/utopia/UTPA2-700.0.x/modules/xc/hal/maserati/xc/include/
H A Dhwreg_adc_atop.h625 #define REG_ADC_CHIPTOP_12_L (REG_ADC_CHIPTOP_BASE + 0x24)
626 #define REG_ADC_CHIPTOP_12_H (REG_ADC_CHIPTOP_BASE + 0x25)
H A Dmhal_xc_chip_config.h580 #define REG_ADC_CHIPTOP_BASE 0x101E00UL // 0x1E00 - 0x1EFF macro
/utopia/UTPA2-700.0.x/modules/xc/hal/M7621/xc/include/
H A Dhwreg_adc_atop.h625 #define REG_ADC_CHIPTOP_12_L (REG_ADC_CHIPTOP_BASE + 0x24)
626 #define REG_ADC_CHIPTOP_12_H (REG_ADC_CHIPTOP_BASE + 0x25)
H A Dmhal_xc_chip_config.h562 #define REG_ADC_CHIPTOP_BASE 0x101E00UL // 0x1E00 - 0x1EFF macro
/utopia/UTPA2-700.0.x/modules/xc/hal/mustang/xc/
H A Dmhal_adc.c578 u32Addr = u32Addr | ( REG_ADC_CHIPTOP_BASE & 0xFFFF0000 ); in Hal_ADC_LoadTable()

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