1*53ee8cc1Swenshuai.xi //<MStar Software> 2*53ee8cc1Swenshuai.xi //****************************************************************************** 3*53ee8cc1Swenshuai.xi // MStar Software 4*53ee8cc1Swenshuai.xi // Copyright (c) 2010 - 2012 MStar Semiconductor, Inc. All rights reserved. 5*53ee8cc1Swenshuai.xi // All software, firmware and related documentation herein ("MStar Software") are 6*53ee8cc1Swenshuai.xi // intellectual property of MStar Semiconductor, Inc. ("MStar") and protected by 7*53ee8cc1Swenshuai.xi // law, including, but not limited to, copyright law and international treaties. 8*53ee8cc1Swenshuai.xi // Any use, modification, reproduction, retransmission, or republication of all 9*53ee8cc1Swenshuai.xi // or part of MStar Software is expressly prohibited, unless prior written 10*53ee8cc1Swenshuai.xi // permission has been granted by MStar. 11*53ee8cc1Swenshuai.xi // 12*53ee8cc1Swenshuai.xi // By accessing, browsing and/or using MStar Software, you acknowledge that you 13*53ee8cc1Swenshuai.xi // have read, understood, and agree, to be bound by below terms ("Terms") and to 14*53ee8cc1Swenshuai.xi // comply with all applicable laws and regulations: 15*53ee8cc1Swenshuai.xi // 16*53ee8cc1Swenshuai.xi // 1. MStar shall retain any and all right, ownership and interest to MStar 17*53ee8cc1Swenshuai.xi // Software and any modification/derivatives thereof. 18*53ee8cc1Swenshuai.xi // No right, ownership, or interest to MStar Software and any 19*53ee8cc1Swenshuai.xi // modification/derivatives thereof is transferred to you under Terms. 20*53ee8cc1Swenshuai.xi // 21*53ee8cc1Swenshuai.xi // 2. You understand that MStar Software might include, incorporate or be 22*53ee8cc1Swenshuai.xi // supplied together with third party`s software and the use of MStar 23*53ee8cc1Swenshuai.xi // Software may require additional licenses from third parties. 24*53ee8cc1Swenshuai.xi // Therefore, you hereby agree it is your sole responsibility to separately 25*53ee8cc1Swenshuai.xi // obtain any and all third party right and license necessary for your use of 26*53ee8cc1Swenshuai.xi // such third party`s software. 27*53ee8cc1Swenshuai.xi // 28*53ee8cc1Swenshuai.xi // 3. MStar Software and any modification/derivatives thereof shall be deemed as 29*53ee8cc1Swenshuai.xi // MStar`s confidential information and you agree to keep MStar`s 30*53ee8cc1Swenshuai.xi // confidential information in strictest confidence and not disclose to any 31*53ee8cc1Swenshuai.xi // third party. 32*53ee8cc1Swenshuai.xi // 33*53ee8cc1Swenshuai.xi // 4. MStar Software is provided on an "AS IS" basis without warranties of any 34*53ee8cc1Swenshuai.xi // kind. Any warranties are hereby expressly disclaimed by MStar, including 35*53ee8cc1Swenshuai.xi // without limitation, any warranties of merchantability, non-infringement of 36*53ee8cc1Swenshuai.xi // intellectual property rights, fitness for a particular purpose, error free 37*53ee8cc1Swenshuai.xi // and in conformity with any international standard. You agree to waive any 38*53ee8cc1Swenshuai.xi // claim against MStar for any loss, damage, cost or expense that you may 39*53ee8cc1Swenshuai.xi // incur related to your use of MStar Software. 40*53ee8cc1Swenshuai.xi // In no event shall MStar be liable for any direct, indirect, incidental or 41*53ee8cc1Swenshuai.xi // consequential damages, including without limitation, lost of profit or 42*53ee8cc1Swenshuai.xi // revenues, lost or damage of data, and unauthorized system use. 43*53ee8cc1Swenshuai.xi // You agree that this Section 4 shall still apply without being affected 44*53ee8cc1Swenshuai.xi // even if MStar Software has been modified by MStar in accordance with your 45*53ee8cc1Swenshuai.xi // request or instruction for your use, except otherwise agreed by both 46*53ee8cc1Swenshuai.xi // parties in writing. 47*53ee8cc1Swenshuai.xi // 48*53ee8cc1Swenshuai.xi // 5. If requested, MStar may from time to time provide technical supports or 49*53ee8cc1Swenshuai.xi // services in relation with MStar Software to you for your use of 50*53ee8cc1Swenshuai.xi // MStar Software in conjunction with your or your customer`s product 51*53ee8cc1Swenshuai.xi // ("Services"). 52*53ee8cc1Swenshuai.xi // You understand and agree that, except otherwise agreed by both parties in 53*53ee8cc1Swenshuai.xi // writing, Services are provided on an "AS IS" basis and the warranty 54*53ee8cc1Swenshuai.xi // disclaimer set forth in Section 4 above shall apply. 55*53ee8cc1Swenshuai.xi // 56*53ee8cc1Swenshuai.xi // 6. Nothing contained herein shall be construed as by implication, estoppels 57*53ee8cc1Swenshuai.xi // or otherwise: 58*53ee8cc1Swenshuai.xi // (a) conferring any license or right to use MStar name, trademark, service 59*53ee8cc1Swenshuai.xi // mark, symbol or any other identification; 60*53ee8cc1Swenshuai.xi // (b) obligating MStar or any of its affiliates to furnish any person, 61*53ee8cc1Swenshuai.xi // including without limitation, you and your customers, any assistance 62*53ee8cc1Swenshuai.xi // of any kind whatsoever, or any information; or 63*53ee8cc1Swenshuai.xi // (c) conferring any license or right under any intellectual property right. 64*53ee8cc1Swenshuai.xi // 65*53ee8cc1Swenshuai.xi // 7. These terms shall be governed by and construed in accordance with the laws 66*53ee8cc1Swenshuai.xi // of Taiwan, R.O.C., excluding its conflict of law rules. 67*53ee8cc1Swenshuai.xi // Any and all dispute arising out hereof or related hereto shall be finally 68*53ee8cc1Swenshuai.xi // settled by arbitration referred to the Chinese Arbitration Association, 69*53ee8cc1Swenshuai.xi // Taipei in accordance with the ROC Arbitration Law and the Arbitration 70*53ee8cc1Swenshuai.xi // Rules of the Association by three (3) arbitrators appointed in accordance 71*53ee8cc1Swenshuai.xi // with the said Rules. 72*53ee8cc1Swenshuai.xi // The place of arbitration shall be in Taipei, Taiwan and the language shall 73*53ee8cc1Swenshuai.xi // be English. 74*53ee8cc1Swenshuai.xi // The arbitration award shall be final and binding to both parties. 75*53ee8cc1Swenshuai.xi // 76*53ee8cc1Swenshuai.xi //****************************************************************************** 77*53ee8cc1Swenshuai.xi //<MStar Software> 78*53ee8cc1Swenshuai.xi //////////////////////////////////////////////////////////////////////////////// 79*53ee8cc1Swenshuai.xi // 80*53ee8cc1Swenshuai.xi // Copyright (c) 2008-2009 MStar Semiconductor, Inc. 81*53ee8cc1Swenshuai.xi // All rights reserved. 82*53ee8cc1Swenshuai.xi // 83*53ee8cc1Swenshuai.xi // Unless otherwise stipulated in writing, any and all information contained 84*53ee8cc1Swenshuai.xi // herein regardless in any format shall remain the sole proprietary of 85*53ee8cc1Swenshuai.xi // MStar Semiconductor Inc. and be kept in strict confidence 86*53ee8cc1Swenshuai.xi // ("MStar Confidential Information") by the recipient. 87*53ee8cc1Swenshuai.xi // Any unauthorized act including without limitation unauthorized disclosure, 88*53ee8cc1Swenshuai.xi // copying, use, reproduction, sale, distribution, modification, disassembling, 89*53ee8cc1Swenshuai.xi // reverse engineering and compiling of the contents of MStar Confidential 90*53ee8cc1Swenshuai.xi // Information is unlawful and strictly prohibited. MStar hereby reserves the 91*53ee8cc1Swenshuai.xi // rights to any and all damages, losses, costs and expenses resulting therefrom. 92*53ee8cc1Swenshuai.xi // 93*53ee8cc1Swenshuai.xi //////////////////////////////////////////////////////////////////////////////// 94*53ee8cc1Swenshuai.xi 95*53ee8cc1Swenshuai.xi #ifndef _HWREG_ADC_ATOP_H_ 96*53ee8cc1Swenshuai.xi #define _HWREG_ADC_ATOP_H_ 97*53ee8cc1Swenshuai.xi 98*53ee8cc1Swenshuai.xi //============================================================= 99*53ee8cc1Swenshuai.xi //ADC ATOP 100*53ee8cc1Swenshuai.xi //#define REG_ADC_ATOP_BASE 0x2500 101*53ee8cc1Swenshuai.xi #ifndef REG_TABLE_END 102*53ee8cc1Swenshuai.xi #define REG_TABLE_END 0xFFFF 103*53ee8cc1Swenshuai.xi #endif 104*53ee8cc1Swenshuai.xi 105*53ee8cc1Swenshuai.xi #define REG_ADC_ATOP_00_L (REG_ADC_ATOP_BASE + 0x00) 106*53ee8cc1Swenshuai.xi #define REG_ADC_ATOP_00_H (REG_ADC_ATOP_BASE + 0x01) 107*53ee8cc1Swenshuai.xi #define REG_ADC_ATOP_01_L (REG_ADC_ATOP_BASE + 0x02) 108*53ee8cc1Swenshuai.xi #define REG_ADC_ATOP_01_H (REG_ADC_ATOP_BASE + 0x03) 109*53ee8cc1Swenshuai.xi #define REG_ADC_ATOP_02_L (REG_ADC_ATOP_BASE + 0x04) 110*53ee8cc1Swenshuai.xi #define REG_ADC_ATOP_02_H (REG_ADC_ATOP_BASE + 0x05) 111*53ee8cc1Swenshuai.xi #define REG_ADC_ATOP_03_L (REG_ADC_ATOP_BASE + 0x06) 112*53ee8cc1Swenshuai.xi #define REG_ADC_ATOP_03_H (REG_ADC_ATOP_BASE + 0x07) 113*53ee8cc1Swenshuai.xi #define REG_ADC_ATOP_04_L (REG_ADC_ATOP_BASE + 0x08) 114*53ee8cc1Swenshuai.xi #define REG_ADC_ATOP_04_H (REG_ADC_ATOP_BASE + 0x09) 115*53ee8cc1Swenshuai.xi #define REG_ADC_ATOP_05_L (REG_ADC_ATOP_BASE + 0x0A) 116*53ee8cc1Swenshuai.xi #define REG_ADC_ATOP_05_H (REG_ADC_ATOP_BASE + 0x0B) 117*53ee8cc1Swenshuai.xi #define REG_ADC_ATOP_06_L (REG_ADC_ATOP_BASE + 0x0C) 118*53ee8cc1Swenshuai.xi #define REG_ADC_ATOP_06_H (REG_ADC_ATOP_BASE + 0x0D) 119*53ee8cc1Swenshuai.xi #define REG_ADC_ATOP_07_L (REG_ADC_ATOP_BASE + 0x0E) 120*53ee8cc1Swenshuai.xi #define REG_ADC_ATOP_07_H (REG_ADC_ATOP_BASE + 0x0F) 121*53ee8cc1Swenshuai.xi #define REG_ADC_ATOP_08_L (REG_ADC_ATOP_BASE + 0x10) 122*53ee8cc1Swenshuai.xi #define REG_ADC_ATOP_08_H (REG_ADC_ATOP_BASE + 0x11) 123*53ee8cc1Swenshuai.xi #define REG_ADC_ATOP_09_L (REG_ADC_ATOP_BASE + 0x12) 124*53ee8cc1Swenshuai.xi #define REG_ADC_ATOP_09_H (REG_ADC_ATOP_BASE + 0x13) 125*53ee8cc1Swenshuai.xi #define REG_ADC_ATOP_0A_L (REG_ADC_ATOP_BASE + 0x14) 126*53ee8cc1Swenshuai.xi #define REG_ADC_ATOP_0A_H (REG_ADC_ATOP_BASE + 0x15) 127*53ee8cc1Swenshuai.xi #define REG_ADC_ATOP_0B_L (REG_ADC_ATOP_BASE + 0x16) 128*53ee8cc1Swenshuai.xi #define REG_ADC_ATOP_0B_H (REG_ADC_ATOP_BASE + 0x17) 129*53ee8cc1Swenshuai.xi #define REG_ADC_ATOP_0C_L (REG_ADC_ATOP_BASE + 0x18) 130*53ee8cc1Swenshuai.xi #define REG_ADC_ATOP_0C_H (REG_ADC_ATOP_BASE + 0x19) 131*53ee8cc1Swenshuai.xi #define REG_ADC_ATOP_0D_L (REG_ADC_ATOP_BASE + 0x1A) 132*53ee8cc1Swenshuai.xi #define REG_ADC_ATOP_0D_H (REG_ADC_ATOP_BASE + 0x1B) 133*53ee8cc1Swenshuai.xi #define REG_ADC_ATOP_0E_L (REG_ADC_ATOP_BASE + 0x1C) 134*53ee8cc1Swenshuai.xi #define REG_ADC_ATOP_0E_H (REG_ADC_ATOP_BASE + 0x1D) 135*53ee8cc1Swenshuai.xi #define REG_ADC_ATOP_0F_L (REG_ADC_ATOP_BASE + 0x1E) 136*53ee8cc1Swenshuai.xi #define REG_ADC_ATOP_0F_H (REG_ADC_ATOP_BASE + 0x1F) 137*53ee8cc1Swenshuai.xi #define REG_ADC_ATOP_10_L (REG_ADC_ATOP_BASE + 0x20) 138*53ee8cc1Swenshuai.xi #define REG_ADC_ATOP_10_H (REG_ADC_ATOP_BASE + 0x21) 139*53ee8cc1Swenshuai.xi #define REG_ADC_ATOP_11_L (REG_ADC_ATOP_BASE + 0x22) 140*53ee8cc1Swenshuai.xi #define REG_ADC_ATOP_11_H (REG_ADC_ATOP_BASE + 0x23) 141*53ee8cc1Swenshuai.xi #define REG_ADC_ATOP_12_L (REG_ADC_ATOP_BASE + 0x24) 142*53ee8cc1Swenshuai.xi #define REG_ADC_ATOP_12_H (REG_ADC_ATOP_BASE + 0x25) 143*53ee8cc1Swenshuai.xi #define REG_ADC_ATOP_13_L (REG_ADC_ATOP_BASE + 0x26) 144*53ee8cc1Swenshuai.xi #define REG_ADC_ATOP_13_H (REG_ADC_ATOP_BASE + 0x27) 145*53ee8cc1Swenshuai.xi #define REG_ADC_ATOP_14_L (REG_ADC_ATOP_BASE + 0x28) 146*53ee8cc1Swenshuai.xi #define REG_ADC_ATOP_14_H (REG_ADC_ATOP_BASE + 0x29) 147*53ee8cc1Swenshuai.xi #define REG_ADC_ATOP_15_L (REG_ADC_ATOP_BASE + 0x2A) 148*53ee8cc1Swenshuai.xi #define REG_ADC_ATOP_15_H (REG_ADC_ATOP_BASE + 0x2B) 149*53ee8cc1Swenshuai.xi #define REG_ADC_ATOP_16_L (REG_ADC_ATOP_BASE + 0x2C) 150*53ee8cc1Swenshuai.xi #define REG_ADC_ATOP_16_H (REG_ADC_ATOP_BASE + 0x2D) 151*53ee8cc1Swenshuai.xi #define REG_ADC_ATOP_17_L (REG_ADC_ATOP_BASE + 0x2E) 152*53ee8cc1Swenshuai.xi #define REG_ADC_ATOP_17_H (REG_ADC_ATOP_BASE + 0x2F) 153*53ee8cc1Swenshuai.xi #define REG_ADC_ATOP_18_L (REG_ADC_ATOP_BASE + 0x30) 154*53ee8cc1Swenshuai.xi #define REG_ADC_ATOP_18_H (REG_ADC_ATOP_BASE + 0x31) 155*53ee8cc1Swenshuai.xi #define REG_ADC_ATOP_19_L (REG_ADC_ATOP_BASE + 0x32) 156*53ee8cc1Swenshuai.xi #define REG_ADC_ATOP_19_H (REG_ADC_ATOP_BASE + 0x33) 157*53ee8cc1Swenshuai.xi #define REG_ADC_ATOP_1A_L (REG_ADC_ATOP_BASE + 0x34) 158*53ee8cc1Swenshuai.xi #define REG_ADC_ATOP_1A_H (REG_ADC_ATOP_BASE + 0x35) 159*53ee8cc1Swenshuai.xi #define REG_ADC_ATOP_1B_L (REG_ADC_ATOP_BASE + 0x36) 160*53ee8cc1Swenshuai.xi #define REG_ADC_ATOP_1B_H (REG_ADC_ATOP_BASE + 0x37) 161*53ee8cc1Swenshuai.xi #define REG_ADC_ATOP_1C_L (REG_ADC_ATOP_BASE + 0x38) 162*53ee8cc1Swenshuai.xi #define REG_ADC_ATOP_1C_H (REG_ADC_ATOP_BASE + 0x39) 163*53ee8cc1Swenshuai.xi #define REG_ADC_ATOP_1D_L (REG_ADC_ATOP_BASE + 0x3A) 164*53ee8cc1Swenshuai.xi #define REG_ADC_ATOP_1D_H (REG_ADC_ATOP_BASE + 0x3B) 165*53ee8cc1Swenshuai.xi #define REG_ADC_ATOP_1E_L (REG_ADC_ATOP_BASE + 0x3C) 166*53ee8cc1Swenshuai.xi #define REG_ADC_ATOP_1E_H (REG_ADC_ATOP_BASE + 0x3D) 167*53ee8cc1Swenshuai.xi #define REG_ADC_ATOP_1F_L (REG_ADC_ATOP_BASE + 0x3E) 168*53ee8cc1Swenshuai.xi #define REG_ADC_ATOP_1F_H (REG_ADC_ATOP_BASE + 0x3F) 169*53ee8cc1Swenshuai.xi #define REG_ADC_ATOP_20_L (REG_ADC_ATOP_BASE + 0x40) 170*53ee8cc1Swenshuai.xi #define REG_ADC_ATOP_20_H (REG_ADC_ATOP_BASE + 0x41) 171*53ee8cc1Swenshuai.xi #define REG_ADC_ATOP_21_L (REG_ADC_ATOP_BASE + 0x42) 172*53ee8cc1Swenshuai.xi #define REG_ADC_ATOP_21_H (REG_ADC_ATOP_BASE + 0x43) 173*53ee8cc1Swenshuai.xi #define REG_ADC_ATOP_22_L (REG_ADC_ATOP_BASE + 0x44) 174*53ee8cc1Swenshuai.xi #define REG_ADC_ATOP_22_H (REG_ADC_ATOP_BASE + 0x45) 175*53ee8cc1Swenshuai.xi #define REG_ADC_ATOP_23_L (REG_ADC_ATOP_BASE + 0x46) 176*53ee8cc1Swenshuai.xi #define REG_ADC_ATOP_23_H (REG_ADC_ATOP_BASE + 0x47) 177*53ee8cc1Swenshuai.xi #define REG_ADC_ATOP_24_L (REG_ADC_ATOP_BASE + 0x48) 178*53ee8cc1Swenshuai.xi #define REG_ADC_ATOP_24_H (REG_ADC_ATOP_BASE + 0x49) 179*53ee8cc1Swenshuai.xi #define REG_ADC_ATOP_25_L (REG_ADC_ATOP_BASE + 0x4A) 180*53ee8cc1Swenshuai.xi #define REG_ADC_ATOP_25_H (REG_ADC_ATOP_BASE + 0x4B) 181*53ee8cc1Swenshuai.xi #define REG_ADC_ATOP_26_L (REG_ADC_ATOP_BASE + 0x4C) 182*53ee8cc1Swenshuai.xi #define REG_ADC_ATOP_26_H (REG_ADC_ATOP_BASE + 0x4D) 183*53ee8cc1Swenshuai.xi #define REG_ADC_ATOP_27_L (REG_ADC_ATOP_BASE + 0x4E) 184*53ee8cc1Swenshuai.xi #define REG_ADC_ATOP_27_H (REG_ADC_ATOP_BASE + 0x4F) 185*53ee8cc1Swenshuai.xi #define REG_ADC_ATOP_28_L (REG_ADC_ATOP_BASE + 0x50) 186*53ee8cc1Swenshuai.xi #define REG_ADC_ATOP_28_H (REG_ADC_ATOP_BASE + 0x51) 187*53ee8cc1Swenshuai.xi #define REG_ADC_ATOP_29_L (REG_ADC_ATOP_BASE + 0x52) 188*53ee8cc1Swenshuai.xi #define REG_ADC_ATOP_29_H (REG_ADC_ATOP_BASE + 0x53) 189*53ee8cc1Swenshuai.xi #define REG_ADC_ATOP_2A_L (REG_ADC_ATOP_BASE + 0x54) 190*53ee8cc1Swenshuai.xi #define REG_ADC_ATOP_2A_H (REG_ADC_ATOP_BASE + 0x55) 191*53ee8cc1Swenshuai.xi #define REG_ADC_ATOP_2B_L (REG_ADC_ATOP_BASE + 0x56) 192*53ee8cc1Swenshuai.xi #define REG_ADC_ATOP_2B_H (REG_ADC_ATOP_BASE + 0x57) 193*53ee8cc1Swenshuai.xi #define REG_ADC_ATOP_2C_L (REG_ADC_ATOP_BASE + 0x58) 194*53ee8cc1Swenshuai.xi #define REG_ADC_ATOP_2C_H (REG_ADC_ATOP_BASE + 0x59) 195*53ee8cc1Swenshuai.xi #define REG_ADC_ATOP_2D_L (REG_ADC_ATOP_BASE + 0x5A) 196*53ee8cc1Swenshuai.xi #define REG_ADC_ATOP_2D_H (REG_ADC_ATOP_BASE + 0x5B) 197*53ee8cc1Swenshuai.xi #define REG_ADC_ATOP_2E_L (REG_ADC_ATOP_BASE + 0x5C) 198*53ee8cc1Swenshuai.xi #define REG_ADC_ATOP_2E_H (REG_ADC_ATOP_BASE + 0x5D) 199*53ee8cc1Swenshuai.xi #define REG_ADC_ATOP_2F_L (REG_ADC_ATOP_BASE + 0x5E) 200*53ee8cc1Swenshuai.xi #define REG_ADC_ATOP_2F_H (REG_ADC_ATOP_BASE + 0x5F) 201*53ee8cc1Swenshuai.xi #define REG_ADC_ATOP_30_L (REG_ADC_ATOP_BASE + 0x60) 202*53ee8cc1Swenshuai.xi #define REG_ADC_ATOP_30_H (REG_ADC_ATOP_BASE + 0x61) 203*53ee8cc1Swenshuai.xi #define REG_ADC_ATOP_31_L (REG_ADC_ATOP_BASE + 0x62) 204*53ee8cc1Swenshuai.xi #define REG_ADC_ATOP_31_H (REG_ADC_ATOP_BASE + 0x63) 205*53ee8cc1Swenshuai.xi #define REG_ADC_ATOP_32_L (REG_ADC_ATOP_BASE + 0x64) 206*53ee8cc1Swenshuai.xi #define REG_ADC_ATOP_32_H (REG_ADC_ATOP_BASE + 0x65) 207*53ee8cc1Swenshuai.xi #define REG_ADC_ATOP_33_L (REG_ADC_ATOP_BASE + 0x66) 208*53ee8cc1Swenshuai.xi #define REG_ADC_ATOP_33_H (REG_ADC_ATOP_BASE + 0x67) 209*53ee8cc1Swenshuai.xi #define REG_ADC_ATOP_34_L (REG_ADC_ATOP_BASE + 0x68) 210*53ee8cc1Swenshuai.xi #define REG_ADC_ATOP_34_H (REG_ADC_ATOP_BASE + 0x69) 211*53ee8cc1Swenshuai.xi #define REG_ADC_ATOP_35_L (REG_ADC_ATOP_BASE + 0x6A) 212*53ee8cc1Swenshuai.xi #define REG_ADC_ATOP_35_H (REG_ADC_ATOP_BASE + 0x6B) 213*53ee8cc1Swenshuai.xi #define REG_ADC_ATOP_36_L (REG_ADC_ATOP_BASE + 0x6C) 214*53ee8cc1Swenshuai.xi #define REG_ADC_ATOP_36_H (REG_ADC_ATOP_BASE + 0x6D) 215*53ee8cc1Swenshuai.xi #define REG_ADC_ATOP_37_L (REG_ADC_ATOP_BASE + 0x6E) 216*53ee8cc1Swenshuai.xi #define REG_ADC_ATOP_37_H (REG_ADC_ATOP_BASE + 0x6F) 217*53ee8cc1Swenshuai.xi #define REG_ADC_ATOP_38_L (REG_ADC_ATOP_BASE + 0x70) 218*53ee8cc1Swenshuai.xi #define REG_ADC_ATOP_38_H (REG_ADC_ATOP_BASE + 0x71) 219*53ee8cc1Swenshuai.xi #define REG_ADC_ATOP_39_L (REG_ADC_ATOP_BASE + 0x72) 220*53ee8cc1Swenshuai.xi #define REG_ADC_ATOP_39_H (REG_ADC_ATOP_BASE + 0x73) 221*53ee8cc1Swenshuai.xi #define REG_ADC_ATOP_3A_L (REG_ADC_ATOP_BASE + 0x74) 222*53ee8cc1Swenshuai.xi #define REG_ADC_ATOP_3A_H (REG_ADC_ATOP_BASE + 0x75) 223*53ee8cc1Swenshuai.xi #define REG_ADC_ATOP_3B_L (REG_ADC_ATOP_BASE + 0x76) 224*53ee8cc1Swenshuai.xi #define REG_ADC_ATOP_3B_H (REG_ADC_ATOP_BASE + 0x77) 225*53ee8cc1Swenshuai.xi #define REG_ADC_ATOP_3C_L (REG_ADC_ATOP_BASE + 0x78) 226*53ee8cc1Swenshuai.xi #define REG_ADC_ATOP_3C_H (REG_ADC_ATOP_BASE + 0x79) 227*53ee8cc1Swenshuai.xi #define REG_ADC_ATOP_3D_L (REG_ADC_ATOP_BASE + 0x7A) 228*53ee8cc1Swenshuai.xi #define REG_ADC_ATOP_3D_H (REG_ADC_ATOP_BASE + 0x7B) 229*53ee8cc1Swenshuai.xi #define REG_ADC_ATOP_3E_L (REG_ADC_ATOP_BASE + 0x7C) 230*53ee8cc1Swenshuai.xi #define REG_ADC_ATOP_3E_H (REG_ADC_ATOP_BASE + 0x7D) 231*53ee8cc1Swenshuai.xi #define REG_ADC_ATOP_3F_L (REG_ADC_ATOP_BASE + 0x7E) 232*53ee8cc1Swenshuai.xi #define REG_ADC_ATOP_3F_H (REG_ADC_ATOP_BASE + 0x7F) 233*53ee8cc1Swenshuai.xi #define REG_ADC_ATOP_40_L (REG_ADC_ATOP_BASE + 0x80) 234*53ee8cc1Swenshuai.xi #define REG_ADC_ATOP_40_H (REG_ADC_ATOP_BASE + 0x81) 235*53ee8cc1Swenshuai.xi #define REG_ADC_ATOP_41_L (REG_ADC_ATOP_BASE + 0x82) 236*53ee8cc1Swenshuai.xi #define REG_ADC_ATOP_41_H (REG_ADC_ATOP_BASE + 0x83) 237*53ee8cc1Swenshuai.xi #define REG_ADC_ATOP_42_L (REG_ADC_ATOP_BASE + 0x84) 238*53ee8cc1Swenshuai.xi #define REG_ADC_ATOP_42_H (REG_ADC_ATOP_BASE + 0x85) 239*53ee8cc1Swenshuai.xi #define REG_ADC_ATOP_43_L (REG_ADC_ATOP_BASE + 0x86) 240*53ee8cc1Swenshuai.xi #define REG_ADC_ATOP_43_H (REG_ADC_ATOP_BASE + 0x87) 241*53ee8cc1Swenshuai.xi #define REG_ADC_ATOP_44_L (REG_ADC_ATOP_BASE + 0x88) 242*53ee8cc1Swenshuai.xi #define REG_ADC_ATOP_44_H (REG_ADC_ATOP_BASE + 0x89) 243*53ee8cc1Swenshuai.xi #define REG_ADC_ATOP_45_L (REG_ADC_ATOP_BASE + 0x8A) 244*53ee8cc1Swenshuai.xi #define REG_ADC_ATOP_45_H (REG_ADC_ATOP_BASE + 0x8B) 245*53ee8cc1Swenshuai.xi #define REG_ADC_ATOP_46_L (REG_ADC_ATOP_BASE + 0x8C) 246*53ee8cc1Swenshuai.xi #define REG_ADC_ATOP_46_H (REG_ADC_ATOP_BASE + 0x8D) 247*53ee8cc1Swenshuai.xi #define REG_ADC_ATOP_47_L (REG_ADC_ATOP_BASE + 0x8E) 248*53ee8cc1Swenshuai.xi #define REG_ADC_ATOP_47_H (REG_ADC_ATOP_BASE + 0x8F) 249*53ee8cc1Swenshuai.xi #define REG_ADC_ATOP_48_L (REG_ADC_ATOP_BASE + 0x90) 250*53ee8cc1Swenshuai.xi #define REG_ADC_ATOP_48_H (REG_ADC_ATOP_BASE + 0x91) 251*53ee8cc1Swenshuai.xi #define REG_ADC_ATOP_49_L (REG_ADC_ATOP_BASE + 0x92) 252*53ee8cc1Swenshuai.xi #define REG_ADC_ATOP_49_H (REG_ADC_ATOP_BASE + 0x93) 253*53ee8cc1Swenshuai.xi #define REG_ADC_ATOP_4A_L (REG_ADC_ATOP_BASE + 0x94) 254*53ee8cc1Swenshuai.xi #define REG_ADC_ATOP_4A_H (REG_ADC_ATOP_BASE + 0x95) 255*53ee8cc1Swenshuai.xi #define REG_ADC_ATOP_4B_L (REG_ADC_ATOP_BASE + 0x96) 256*53ee8cc1Swenshuai.xi #define REG_ADC_ATOP_4B_H (REG_ADC_ATOP_BASE + 0x97) 257*53ee8cc1Swenshuai.xi #define REG_ADC_ATOP_4C_L (REG_ADC_ATOP_BASE + 0x98) 258*53ee8cc1Swenshuai.xi #define REG_ADC_ATOP_4C_H (REG_ADC_ATOP_BASE + 0x99) 259*53ee8cc1Swenshuai.xi #define REG_ADC_ATOP_4D_L (REG_ADC_ATOP_BASE + 0x9A) 260*53ee8cc1Swenshuai.xi #define REG_ADC_ATOP_4D_H (REG_ADC_ATOP_BASE + 0x9B) 261*53ee8cc1Swenshuai.xi #define REG_ADC_ATOP_4E_L (REG_ADC_ATOP_BASE + 0x9C) 262*53ee8cc1Swenshuai.xi #define REG_ADC_ATOP_4E_H (REG_ADC_ATOP_BASE + 0x9D) 263*53ee8cc1Swenshuai.xi #define REG_ADC_ATOP_4F_L (REG_ADC_ATOP_BASE + 0x9E) 264*53ee8cc1Swenshuai.xi #define REG_ADC_ATOP_4F_H (REG_ADC_ATOP_BASE + 0x9F) 265*53ee8cc1Swenshuai.xi #define REG_ADC_ATOP_50_L (REG_ADC_ATOP_BASE + 0xA0) 266*53ee8cc1Swenshuai.xi #define REG_ADC_ATOP_50_H (REG_ADC_ATOP_BASE + 0xA1) 267*53ee8cc1Swenshuai.xi #define REG_ADC_ATOP_51_L (REG_ADC_ATOP_BASE + 0xA2) 268*53ee8cc1Swenshuai.xi #define REG_ADC_ATOP_51_H (REG_ADC_ATOP_BASE + 0xA3) 269*53ee8cc1Swenshuai.xi #define REG_ADC_ATOP_52_L (REG_ADC_ATOP_BASE + 0xA4) 270*53ee8cc1Swenshuai.xi #define REG_ADC_ATOP_52_H (REG_ADC_ATOP_BASE + 0xA5) 271*53ee8cc1Swenshuai.xi #define REG_ADC_ATOP_53_L (REG_ADC_ATOP_BASE + 0xA6) 272*53ee8cc1Swenshuai.xi #define REG_ADC_ATOP_53_H (REG_ADC_ATOP_BASE + 0xA7) 273*53ee8cc1Swenshuai.xi #define REG_ADC_ATOP_54_L (REG_ADC_ATOP_BASE + 0xA8) 274*53ee8cc1Swenshuai.xi #define REG_ADC_ATOP_54_H (REG_ADC_ATOP_BASE + 0xA9) 275*53ee8cc1Swenshuai.xi #define REG_ADC_ATOP_55_L (REG_ADC_ATOP_BASE + 0xAA) 276*53ee8cc1Swenshuai.xi #define REG_ADC_ATOP_55_H (REG_ADC_ATOP_BASE + 0xAB) 277*53ee8cc1Swenshuai.xi #define REG_ADC_ATOP_56_L (REG_ADC_ATOP_BASE + 0xAC) 278*53ee8cc1Swenshuai.xi #define REG_ADC_ATOP_56_H (REG_ADC_ATOP_BASE + 0xAD) 279*53ee8cc1Swenshuai.xi #define REG_ADC_ATOP_57_L (REG_ADC_ATOP_BASE + 0xAE) 280*53ee8cc1Swenshuai.xi #define REG_ADC_ATOP_57_H (REG_ADC_ATOP_BASE + 0xAF) 281*53ee8cc1Swenshuai.xi #define REG_ADC_ATOP_58_L (REG_ADC_ATOP_BASE + 0xB0) 282*53ee8cc1Swenshuai.xi #define REG_ADC_ATOP_58_H (REG_ADC_ATOP_BASE + 0xB1) 283*53ee8cc1Swenshuai.xi #define REG_ADC_ATOP_59_L (REG_ADC_ATOP_BASE + 0xB2) 284*53ee8cc1Swenshuai.xi #define REG_ADC_ATOP_59_H (REG_ADC_ATOP_BASE + 0xB3) 285*53ee8cc1Swenshuai.xi #define REG_ADC_ATOP_5A_L (REG_ADC_ATOP_BASE + 0xB4) 286*53ee8cc1Swenshuai.xi #define REG_ADC_ATOP_5A_H (REG_ADC_ATOP_BASE + 0xB5) 287*53ee8cc1Swenshuai.xi #define REG_ADC_ATOP_5B_L (REG_ADC_ATOP_BASE + 0xB6) 288*53ee8cc1Swenshuai.xi #define REG_ADC_ATOP_5B_H (REG_ADC_ATOP_BASE + 0xB7) 289*53ee8cc1Swenshuai.xi #define REG_ADC_ATOP_5C_L (REG_ADC_ATOP_BASE + 0xB8) 290*53ee8cc1Swenshuai.xi #define REG_ADC_ATOP_5C_H (REG_ADC_ATOP_BASE + 0xB9) 291*53ee8cc1Swenshuai.xi #define REG_ADC_ATOP_5D_L (REG_ADC_ATOP_BASE + 0xBA) 292*53ee8cc1Swenshuai.xi #define REG_ADC_ATOP_5D_H (REG_ADC_ATOP_BASE + 0xBB) 293*53ee8cc1Swenshuai.xi #define REG_ADC_ATOP_5E_L (REG_ADC_ATOP_BASE + 0xBC) 294*53ee8cc1Swenshuai.xi #define REG_ADC_ATOP_5E_H (REG_ADC_ATOP_BASE + 0xBD) 295*53ee8cc1Swenshuai.xi #define REG_ADC_ATOP_5F_L (REG_ADC_ATOP_BASE + 0xBE) 296*53ee8cc1Swenshuai.xi #define REG_ADC_ATOP_5F_H (REG_ADC_ATOP_BASE + 0xBF) 297*53ee8cc1Swenshuai.xi #define REG_ADC_ATOP_60_L (REG_ADC_ATOP_BASE + 0xC0) 298*53ee8cc1Swenshuai.xi #define REG_ADC_ATOP_60_H (REG_ADC_ATOP_BASE + 0xC1) 299*53ee8cc1Swenshuai.xi #define REG_ADC_ATOP_61_L (REG_ADC_ATOP_BASE + 0xC2) 300*53ee8cc1Swenshuai.xi #define REG_ADC_ATOP_61_H (REG_ADC_ATOP_BASE + 0xC3) 301*53ee8cc1Swenshuai.xi #define REG_ADC_ATOP_62_L (REG_ADC_ATOP_BASE + 0xC4) 302*53ee8cc1Swenshuai.xi #define REG_ADC_ATOP_62_H (REG_ADC_ATOP_BASE + 0xC5) 303*53ee8cc1Swenshuai.xi #define REG_ADC_ATOP_63_L (REG_ADC_ATOP_BASE + 0xC6) 304*53ee8cc1Swenshuai.xi #define REG_ADC_ATOP_63_H (REG_ADC_ATOP_BASE + 0xC7) 305*53ee8cc1Swenshuai.xi #define REG_ADC_ATOP_64_L (REG_ADC_ATOP_BASE + 0xC8) 306*53ee8cc1Swenshuai.xi #define REG_ADC_ATOP_64_H (REG_ADC_ATOP_BASE + 0xC9) 307*53ee8cc1Swenshuai.xi #define REG_ADC_ATOP_65_L (REG_ADC_ATOP_BASE + 0xCA) 308*53ee8cc1Swenshuai.xi #define REG_ADC_ATOP_65_H (REG_ADC_ATOP_BASE + 0xCB) 309*53ee8cc1Swenshuai.xi #define REG_ADC_ATOP_66_L (REG_ADC_ATOP_BASE + 0xCC) 310*53ee8cc1Swenshuai.xi #define REG_ADC_ATOP_66_H (REG_ADC_ATOP_BASE + 0xCD) 311*53ee8cc1Swenshuai.xi #define REG_ADC_ATOP_67_L (REG_ADC_ATOP_BASE + 0xCE) 312*53ee8cc1Swenshuai.xi #define REG_ADC_ATOP_67_H (REG_ADC_ATOP_BASE + 0xCF) 313*53ee8cc1Swenshuai.xi #define REG_ADC_ATOP_68_L (REG_ADC_ATOP_BASE + 0xD0) 314*53ee8cc1Swenshuai.xi #define REG_ADC_ATOP_68_H (REG_ADC_ATOP_BASE + 0xD1) 315*53ee8cc1Swenshuai.xi #define REG_ADC_ATOP_69_L (REG_ADC_ATOP_BASE + 0xD2) 316*53ee8cc1Swenshuai.xi #define REG_ADC_ATOP_69_H (REG_ADC_ATOP_BASE + 0xD3) 317*53ee8cc1Swenshuai.xi #define REG_ADC_ATOP_6A_L (REG_ADC_ATOP_BASE + 0xD4) 318*53ee8cc1Swenshuai.xi #define REG_ADC_ATOP_6A_H (REG_ADC_ATOP_BASE + 0xD5) 319*53ee8cc1Swenshuai.xi #define REG_ADC_ATOP_6B_L (REG_ADC_ATOP_BASE + 0xD6) 320*53ee8cc1Swenshuai.xi #define REG_ADC_ATOP_6B_H (REG_ADC_ATOP_BASE + 0xD7) 321*53ee8cc1Swenshuai.xi #define REG_ADC_ATOP_6C_L (REG_ADC_ATOP_BASE + 0xD8) 322*53ee8cc1Swenshuai.xi #define REG_ADC_ATOP_6C_H (REG_ADC_ATOP_BASE + 0xD9) 323*53ee8cc1Swenshuai.xi #define REG_ADC_ATOP_6D_L (REG_ADC_ATOP_BASE + 0xDA) 324*53ee8cc1Swenshuai.xi #define REG_ADC_ATOP_6D_H (REG_ADC_ATOP_BASE + 0xDB) 325*53ee8cc1Swenshuai.xi #define REG_ADC_ATOP_6E_L (REG_ADC_ATOP_BASE + 0xDC) 326*53ee8cc1Swenshuai.xi #define REG_ADC_ATOP_6E_H (REG_ADC_ATOP_BASE + 0xDD) 327*53ee8cc1Swenshuai.xi #define REG_ADC_ATOP_6F_L (REG_ADC_ATOP_BASE + 0xDE) 328*53ee8cc1Swenshuai.xi #define REG_ADC_ATOP_6F_H (REG_ADC_ATOP_BASE + 0xDF) 329*53ee8cc1Swenshuai.xi #define REG_ADC_ATOP_70_L (REG_ADC_ATOP_BASE + 0xE0) 330*53ee8cc1Swenshuai.xi #define REG_ADC_ATOP_70_H (REG_ADC_ATOP_BASE + 0xE1) 331*53ee8cc1Swenshuai.xi #define REG_ADC_ATOP_71_L (REG_ADC_ATOP_BASE + 0xE2) 332*53ee8cc1Swenshuai.xi #define REG_ADC_ATOP_71_H (REG_ADC_ATOP_BASE + 0xE3) 333*53ee8cc1Swenshuai.xi #define REG_ADC_ATOP_72_L (REG_ADC_ATOP_BASE + 0xE4) 334*53ee8cc1Swenshuai.xi #define REG_ADC_ATOP_72_H (REG_ADC_ATOP_BASE + 0xE5) 335*53ee8cc1Swenshuai.xi #define REG_ADC_ATOP_73_L (REG_ADC_ATOP_BASE + 0xE6) 336*53ee8cc1Swenshuai.xi #define REG_ADC_ATOP_73_H (REG_ADC_ATOP_BASE + 0xE7) 337*53ee8cc1Swenshuai.xi #define REG_ADC_ATOP_74_L (REG_ADC_ATOP_BASE + 0xE8) 338*53ee8cc1Swenshuai.xi #define REG_ADC_ATOP_74_H (REG_ADC_ATOP_BASE + 0xE9) 339*53ee8cc1Swenshuai.xi #define REG_ADC_ATOP_75_L (REG_ADC_ATOP_BASE + 0xEA) 340*53ee8cc1Swenshuai.xi #define REG_ADC_ATOP_75_H (REG_ADC_ATOP_BASE + 0xEB) 341*53ee8cc1Swenshuai.xi #define REG_ADC_ATOP_76_L (REG_ADC_ATOP_BASE + 0xEC) 342*53ee8cc1Swenshuai.xi #define REG_ADC_ATOP_76_H (REG_ADC_ATOP_BASE + 0xED) 343*53ee8cc1Swenshuai.xi #define REG_ADC_ATOP_77_L (REG_ADC_ATOP_BASE + 0xEE) 344*53ee8cc1Swenshuai.xi #define REG_ADC_ATOP_77_H (REG_ADC_ATOP_BASE + 0xEF) 345*53ee8cc1Swenshuai.xi #define REG_ADC_ATOP_78_L (REG_ADC_ATOP_BASE + 0xF0) 346*53ee8cc1Swenshuai.xi #define REG_ADC_ATOP_78_H (REG_ADC_ATOP_BASE + 0xF1) 347*53ee8cc1Swenshuai.xi #define REG_ADC_ATOP_79_L (REG_ADC_ATOP_BASE + 0xF2) 348*53ee8cc1Swenshuai.xi #define REG_ADC_ATOP_79_H (REG_ADC_ATOP_BASE + 0xF3) 349*53ee8cc1Swenshuai.xi #define REG_ADC_ATOP_7A_L (REG_ADC_ATOP_BASE + 0xF4) 350*53ee8cc1Swenshuai.xi #define REG_ADC_ATOP_7A_H (REG_ADC_ATOP_BASE + 0xF5) 351*53ee8cc1Swenshuai.xi #define REG_ADC_ATOP_7B_L (REG_ADC_ATOP_BASE + 0xF6) 352*53ee8cc1Swenshuai.xi #define REG_ADC_ATOP_7B_H (REG_ADC_ATOP_BASE + 0xF7) 353*53ee8cc1Swenshuai.xi #define REG_ADC_ATOP_7C_L (REG_ADC_ATOP_BASE + 0xF8) 354*53ee8cc1Swenshuai.xi #define REG_ADC_ATOP_7C_H (REG_ADC_ATOP_BASE + 0xF9) 355*53ee8cc1Swenshuai.xi #define REG_ADC_ATOP_7D_L (REG_ADC_ATOP_BASE + 0xFA) 356*53ee8cc1Swenshuai.xi #define REG_ADC_ATOP_7D_H (REG_ADC_ATOP_BASE + 0xFB) 357*53ee8cc1Swenshuai.xi #define REG_ADC_ATOP_7E_L (REG_ADC_ATOP_BASE + 0xFC) 358*53ee8cc1Swenshuai.xi #define REG_ADC_ATOP_7E_H (REG_ADC_ATOP_BASE + 0xFD) 359*53ee8cc1Swenshuai.xi #define REG_ADC_ATOP_7F_L (REG_ADC_ATOP_BASE + 0xFE) 360*53ee8cc1Swenshuai.xi #define REG_ADC_ATOP_7F_H (REG_ADC_ATOP_BASE + 0xFF) 361*53ee8cc1Swenshuai.xi 362*53ee8cc1Swenshuai.xi #define REG_ADC_ATOPB_00_L (REG_ADC_ATOPB_BASE + 0x00) 363*53ee8cc1Swenshuai.xi #define REG_ADC_ATOPB_00_H (REG_ADC_ATOPB_BASE + 0x01) 364*53ee8cc1Swenshuai.xi #define REG_ADC_ATOPB_08_L (REG_ADC_ATOPB_BASE + 0x10) 365*53ee8cc1Swenshuai.xi #define REG_ADC_ATOPB_08_H (REG_ADC_ATOPB_BASE + 0x11) 366*53ee8cc1Swenshuai.xi 367*53ee8cc1Swenshuai.xi // Einstein new 368*53ee8cc1Swenshuai.xi #define REG_ADC_AFEC_7A_L (REG_AFEC_BASE + 0xF4) 369*53ee8cc1Swenshuai.xi #define REG_ADC_AFEC_7A_H (REG_AFEC_BASE + 0xF5) 370*53ee8cc1Swenshuai.xi 371*53ee8cc1Swenshuai.xi #define REG_ADC_COMB_47_L (REG_COMB_BASE + 0x8E) 372*53ee8cc1Swenshuai.xi #define REG_ADC_COMB_47_H (REG_COMB_BASE + 0x8F) 373*53ee8cc1Swenshuai.xi 374*53ee8cc1Swenshuai.xi #define REG_ADC_CHIPTOP_12_L (REG_ADC_CHIPTOP_BASE + 0x24) 375*53ee8cc1Swenshuai.xi #define REG_ADC_CHIPTOP_12_H (REG_ADC_CHIPTOP_BASE + 0x25) 376*53ee8cc1Swenshuai.xi 377*53ee8cc1Swenshuai.xi #define REG_ADC_CLKGEN0_20_L (REG_CLKGEN0_BASE + 0x40) 378*53ee8cc1Swenshuai.xi #define REG_ADC_CLKGEN0_20_H (REG_CLKGEN0_BASE + 0x41) 379*53ee8cc1Swenshuai.xi #define REG_ADC_CLKGEN0_26_L (REG_CLKGEN0_BASE + 0x4C) 380*53ee8cc1Swenshuai.xi #define REG_ADC_CLKGEN0_26_H (REG_CLKGEN0_BASE + 0x4D) 381*53ee8cc1Swenshuai.xi 382*53ee8cc1Swenshuai.xi 383*53ee8cc1Swenshuai.xi #endif 384*53ee8cc1Swenshuai.xi 385