1 //<MStar Software> 2 //****************************************************************************** 3 // MStar Software 4 // Copyright (c) 2010 - 2012 MStar Semiconductor, Inc. All rights reserved. 5 // All software, firmware and related documentation herein ("MStar Software") are 6 // intellectual property of MStar Semiconductor, Inc. ("MStar") and protected by 7 // law, including, but not limited to, copyright law and international treaties. 8 // Any use, modification, reproduction, retransmission, or republication of all 9 // or part of MStar Software is expressly prohibited, unless prior written 10 // permission has been granted by MStar. 11 // 12 // By accessing, browsing and/or using MStar Software, you acknowledge that you 13 // have read, understood, and agree, to be bound by below terms ("Terms") and to 14 // comply with all applicable laws and regulations: 15 // 16 // 1. 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If requested, MStar may from time to time provide technical supports or 49 // services in relation with MStar Software to you for your use of 50 // MStar Software in conjunction with your or your customer`s product 51 // ("Services"). 52 // You understand and agree that, except otherwise agreed by both parties in 53 // writing, Services are provided on an "AS IS" basis and the warranty 54 // disclaimer set forth in Section 4 above shall apply. 55 // 56 // 6. Nothing contained herein shall be construed as by implication, estoppels 57 // or otherwise: 58 // (a) conferring any license or right to use MStar name, trademark, service 59 // mark, symbol or any other identification; 60 // (b) obligating MStar or any of its affiliates to furnish any person, 61 // including without limitation, you and your customers, any assistance 62 // of any kind whatsoever, or any information; or 63 // (c) conferring any license or right under any intellectual property right. 64 // 65 // 7. These terms shall be governed by and construed in accordance with the laws 66 // of Taiwan, R.O.C., excluding its conflict of law rules. 67 // Any and all dispute arising out hereof or related hereto shall be finally 68 // settled by arbitration referred to the Chinese Arbitration Association, 69 // Taipei in accordance with the ROC Arbitration Law and the Arbitration 70 // Rules of the Association by three (3) arbitrators appointed in accordance 71 // with the said Rules. 72 // The place of arbitration shall be in Taipei, Taiwan and the language shall 73 // be English. 74 // The arbitration award shall be final and binding to both parties. 75 // 76 //****************************************************************************** 77 //<MStar Software> 78 //////////////////////////////////////////////////////////////////////////////// 79 // 80 // Copyright (c) 2008-2009 MStar Semiconductor, Inc. 81 // All rights reserved. 82 // 83 // Unless otherwise stipulated in writing, any and all information contained 84 // herein regardless in any format shall remain the sole proprietary of 85 // MStar Semiconductor Inc. and be kept in strict confidence 86 // ("MStar Confidential Information") by the recipient. 87 // Any unauthorized act including without limitation unauthorized disclosure, 88 // copying, use, reproduction, sale, distribution, modification, disassembling, 89 // reverse engineering and compiling of the contents of MStar Confidential 90 // Information is unlawful and strictly prohibited. MStar hereby reserves the 91 // rights to any and all damages, losses, costs and expenses resulting therefrom. 92 // 93 //////////////////////////////////////////////////////////////////////////////// 94 95 #ifndef _HWREG_ADC_ATOP_H_ 96 #define _HWREG_ADC_ATOP_H_ 97 98 //============================================================= 99 //ADC ATOP 100 //#define REG_ADC_ATOP_BASE 0x2500 101 #ifndef REG_TABLE_END 102 #define REG_TABLE_END 0xFFFF 103 #endif 104 105 #define REG_ADC_ATOP_00_L (REG_ADC_ATOP_BASE + 0x00) 106 #define REG_ADC_ATOP_00_H (REG_ADC_ATOP_BASE + 0x01) 107 #define REG_ADC_ATOP_01_L (REG_ADC_ATOP_BASE + 0x02) 108 #define REG_ADC_ATOP_01_H (REG_ADC_ATOP_BASE + 0x03) 109 #define REG_ADC_ATOP_02_L (REG_ADC_ATOP_BASE + 0x04) 110 #define REG_ADC_ATOP_02_H (REG_ADC_ATOP_BASE + 0x05) 111 #define REG_ADC_ATOP_03_L (REG_ADC_ATOP_BASE + 0x06) 112 #define REG_ADC_ATOP_03_H (REG_ADC_ATOP_BASE + 0x07) 113 #define REG_ADC_ATOP_04_L (REG_ADC_ATOP_BASE + 0x08) 114 #define REG_ADC_ATOP_04_H (REG_ADC_ATOP_BASE + 0x09) 115 #define REG_ADC_ATOP_05_L (REG_ADC_ATOP_BASE + 0x0A) 116 #define REG_ADC_ATOP_05_H (REG_ADC_ATOP_BASE + 0x0B) 117 #define REG_ADC_ATOP_06_L (REG_ADC_ATOP_BASE + 0x0C) 118 #define REG_ADC_ATOP_06_H (REG_ADC_ATOP_BASE + 0x0D) 119 #define REG_ADC_ATOP_07_L (REG_ADC_ATOP_BASE + 0x0E) 120 #define REG_ADC_ATOP_07_H (REG_ADC_ATOP_BASE + 0x0F) 121 #define REG_ADC_ATOP_08_L (REG_ADC_ATOP_BASE + 0x10) 122 #define REG_ADC_ATOP_08_H (REG_ADC_ATOP_BASE + 0x11) 123 #define REG_ADC_ATOP_09_L (REG_ADC_ATOP_BASE + 0x12) 124 #define REG_ADC_ATOP_09_H (REG_ADC_ATOP_BASE + 0x13) 125 #define REG_ADC_ATOP_0A_L (REG_ADC_ATOP_BASE + 0x14) 126 #define REG_ADC_ATOP_0A_H (REG_ADC_ATOP_BASE + 0x15) 127 #define REG_ADC_ATOP_0B_L (REG_ADC_ATOP_BASE + 0x16) 128 #define REG_ADC_ATOP_0B_H (REG_ADC_ATOP_BASE + 0x17) 129 #define REG_ADC_ATOP_0C_L (REG_ADC_ATOP_BASE + 0x18) 130 #define REG_ADC_ATOP_0C_H (REG_ADC_ATOP_BASE + 0x19) 131 #define REG_ADC_ATOP_0D_L (REG_ADC_ATOP_BASE + 0x1A) 132 #define REG_ADC_ATOP_0D_H (REG_ADC_ATOP_BASE + 0x1B) 133 #define REG_ADC_ATOP_0E_L (REG_ADC_ATOP_BASE + 0x1C) 134 #define REG_ADC_ATOP_0E_H (REG_ADC_ATOP_BASE + 0x1D) 135 #define REG_ADC_ATOP_0F_L (REG_ADC_ATOP_BASE + 0x1E) 136 #define REG_ADC_ATOP_0F_H (REG_ADC_ATOP_BASE + 0x1F) 137 #define REG_ADC_ATOP_10_L (REG_ADC_ATOP_BASE + 0x20) 138 #define REG_ADC_ATOP_10_H (REG_ADC_ATOP_BASE + 0x21) 139 #define REG_ADC_ATOP_11_L (REG_ADC_ATOP_BASE + 0x22) 140 #define REG_ADC_ATOP_11_H (REG_ADC_ATOP_BASE + 0x23) 141 #define REG_ADC_ATOP_12_L (REG_ADC_ATOP_BASE + 0x24) 142 #define REG_ADC_ATOP_12_H (REG_ADC_ATOP_BASE + 0x25) 143 #define REG_ADC_ATOP_13_L (REG_ADC_ATOP_BASE + 0x26) 144 #define REG_ADC_ATOP_13_H (REG_ADC_ATOP_BASE + 0x27) 145 #define REG_ADC_ATOP_14_L (REG_ADC_ATOP_BASE + 0x28) 146 #define REG_ADC_ATOP_14_H (REG_ADC_ATOP_BASE + 0x29) 147 #define REG_ADC_ATOP_15_L (REG_ADC_ATOP_BASE + 0x2A) 148 #define REG_ADC_ATOP_15_H (REG_ADC_ATOP_BASE + 0x2B) 149 #define REG_ADC_ATOP_16_L (REG_ADC_ATOP_BASE + 0x2C) 150 #define REG_ADC_ATOP_16_H (REG_ADC_ATOP_BASE + 0x2D) 151 #define REG_ADC_ATOP_17_L (REG_ADC_ATOP_BASE + 0x2E) 152 #define REG_ADC_ATOP_17_H (REG_ADC_ATOP_BASE + 0x2F) 153 #define REG_ADC_ATOP_18_L (REG_ADC_ATOP_BASE + 0x30) 154 #define REG_ADC_ATOP_18_H (REG_ADC_ATOP_BASE + 0x31) 155 #define REG_ADC_ATOP_19_L (REG_ADC_ATOP_BASE + 0x32) 156 #define REG_ADC_ATOP_19_H (REG_ADC_ATOP_BASE + 0x33) 157 #define REG_ADC_ATOP_1A_L (REG_ADC_ATOP_BASE + 0x34) 158 #define REG_ADC_ATOP_1A_H (REG_ADC_ATOP_BASE + 0x35) 159 #define REG_ADC_ATOP_1B_L (REG_ADC_ATOP_BASE + 0x36) 160 #define REG_ADC_ATOP_1B_H (REG_ADC_ATOP_BASE + 0x37) 161 #define REG_ADC_ATOP_1C_L (REG_ADC_ATOP_BASE + 0x38) 162 #define REG_ADC_ATOP_1C_H (REG_ADC_ATOP_BASE + 0x39) 163 #define REG_ADC_ATOP_1D_L (REG_ADC_ATOP_BASE + 0x3A) 164 #define REG_ADC_ATOP_1D_H (REG_ADC_ATOP_BASE + 0x3B) 165 #define REG_ADC_ATOP_1E_L (REG_ADC_ATOP_BASE + 0x3C) 166 #define REG_ADC_ATOP_1E_H (REG_ADC_ATOP_BASE + 0x3D) 167 #define REG_ADC_ATOP_1F_L (REG_ADC_ATOP_BASE + 0x3E) 168 #define REG_ADC_ATOP_1F_H (REG_ADC_ATOP_BASE + 0x3F) 169 #define REG_ADC_ATOP_20_L (REG_ADC_ATOP_BASE + 0x40) 170 #define REG_ADC_ATOP_20_H (REG_ADC_ATOP_BASE + 0x41) 171 #define REG_ADC_ATOP_21_L (REG_ADC_ATOP_BASE + 0x42) 172 #define REG_ADC_ATOP_21_H (REG_ADC_ATOP_BASE + 0x43) 173 #define REG_ADC_ATOP_22_L (REG_ADC_ATOP_BASE + 0x44) 174 #define REG_ADC_ATOP_22_H (REG_ADC_ATOP_BASE + 0x45) 175 #define REG_ADC_ATOP_23_L (REG_ADC_ATOP_BASE + 0x46) 176 #define REG_ADC_ATOP_23_H (REG_ADC_ATOP_BASE + 0x47) 177 #define REG_ADC_ATOP_24_L (REG_ADC_ATOP_BASE + 0x48) 178 #define REG_ADC_ATOP_24_H (REG_ADC_ATOP_BASE + 0x49) 179 #define REG_ADC_ATOP_25_L (REG_ADC_ATOP_BASE + 0x4A) 180 #define REG_ADC_ATOP_25_H (REG_ADC_ATOP_BASE + 0x4B) 181 #define REG_ADC_ATOP_26_L (REG_ADC_ATOP_BASE + 0x4C) 182 #define REG_ADC_ATOP_26_H (REG_ADC_ATOP_BASE + 0x4D) 183 #define REG_ADC_ATOP_27_L (REG_ADC_ATOP_BASE + 0x4E) 184 #define REG_ADC_ATOP_27_H (REG_ADC_ATOP_BASE + 0x4F) 185 #define REG_ADC_ATOP_28_L (REG_ADC_ATOP_BASE + 0x50) 186 #define REG_ADC_ATOP_28_H (REG_ADC_ATOP_BASE + 0x51) 187 #define REG_ADC_ATOP_29_L (REG_ADC_ATOP_BASE + 0x52) 188 #define REG_ADC_ATOP_29_H (REG_ADC_ATOP_BASE + 0x53) 189 #define REG_ADC_ATOP_2A_L (REG_ADC_ATOP_BASE + 0x54) 190 #define REG_ADC_ATOP_2A_H (REG_ADC_ATOP_BASE + 0x55) 191 #define REG_ADC_ATOP_2B_L (REG_ADC_ATOP_BASE + 0x56) 192 #define REG_ADC_ATOP_2B_H (REG_ADC_ATOP_BASE + 0x57) 193 #define REG_ADC_ATOP_2C_L (REG_ADC_ATOP_BASE + 0x58) 194 #define REG_ADC_ATOP_2C_H (REG_ADC_ATOP_BASE + 0x59) 195 #define REG_ADC_ATOP_2D_L (REG_ADC_ATOP_BASE + 0x5A) 196 #define REG_ADC_ATOP_2D_H (REG_ADC_ATOP_BASE + 0x5B) 197 #define REG_ADC_ATOP_2E_L (REG_ADC_ATOP_BASE + 0x5C) 198 #define REG_ADC_ATOP_2E_H (REG_ADC_ATOP_BASE + 0x5D) 199 #define REG_ADC_ATOP_2F_L (REG_ADC_ATOP_BASE + 0x5E) 200 #define REG_ADC_ATOP_2F_H (REG_ADC_ATOP_BASE + 0x5F) 201 #define REG_ADC_ATOP_30_L (REG_ADC_ATOP_BASE + 0x60) 202 #define REG_ADC_ATOP_30_H (REG_ADC_ATOP_BASE + 0x61) 203 #define REG_ADC_ATOP_31_L (REG_ADC_ATOP_BASE + 0x62) 204 #define REG_ADC_ATOP_31_H (REG_ADC_ATOP_BASE + 0x63) 205 #define REG_ADC_ATOP_32_L (REG_ADC_ATOP_BASE + 0x64) 206 #define REG_ADC_ATOP_32_H (REG_ADC_ATOP_BASE + 0x65) 207 #define REG_ADC_ATOP_33_L (REG_ADC_ATOP_BASE + 0x66) 208 #define REG_ADC_ATOP_33_H (REG_ADC_ATOP_BASE + 0x67) 209 #define REG_ADC_ATOP_34_L (REG_ADC_ATOP_BASE + 0x68) 210 #define REG_ADC_ATOP_34_H (REG_ADC_ATOP_BASE + 0x69) 211 #define REG_ADC_ATOP_35_L (REG_ADC_ATOP_BASE + 0x6A) 212 #define REG_ADC_ATOP_35_H (REG_ADC_ATOP_BASE + 0x6B) 213 #define REG_ADC_ATOP_36_L (REG_ADC_ATOP_BASE + 0x6C) 214 #define REG_ADC_ATOP_36_H (REG_ADC_ATOP_BASE + 0x6D) 215 #define REG_ADC_ATOP_37_L (REG_ADC_ATOP_BASE + 0x6E) 216 #define REG_ADC_ATOP_37_H (REG_ADC_ATOP_BASE + 0x6F) 217 #define REG_ADC_ATOP_38_L (REG_ADC_ATOP_BASE + 0x70) 218 #define REG_ADC_ATOP_38_H (REG_ADC_ATOP_BASE + 0x71) 219 #define REG_ADC_ATOP_39_L (REG_ADC_ATOP_BASE + 0x72) 220 #define REG_ADC_ATOP_39_H (REG_ADC_ATOP_BASE + 0x73) 221 #define REG_ADC_ATOP_3A_L (REG_ADC_ATOP_BASE + 0x74) 222 #define REG_ADC_ATOP_3A_H (REG_ADC_ATOP_BASE + 0x75) 223 #define REG_ADC_ATOP_3B_L (REG_ADC_ATOP_BASE + 0x76) 224 #define REG_ADC_ATOP_3B_H (REG_ADC_ATOP_BASE + 0x77) 225 #define REG_ADC_ATOP_3C_L (REG_ADC_ATOP_BASE + 0x78) 226 #define REG_ADC_ATOP_3C_H (REG_ADC_ATOP_BASE + 0x79) 227 #define REG_ADC_ATOP_3D_L (REG_ADC_ATOP_BASE + 0x7A) 228 #define REG_ADC_ATOP_3D_H (REG_ADC_ATOP_BASE + 0x7B) 229 #define REG_ADC_ATOP_3E_L (REG_ADC_ATOP_BASE + 0x7C) 230 #define REG_ADC_ATOP_3E_H (REG_ADC_ATOP_BASE + 0x7D) 231 #define REG_ADC_ATOP_3F_L (REG_ADC_ATOP_BASE + 0x7E) 232 #define REG_ADC_ATOP_3F_H (REG_ADC_ATOP_BASE + 0x7F) 233 #define REG_ADC_ATOP_40_L (REG_ADC_ATOP_BASE + 0x80) 234 #define REG_ADC_ATOP_40_H (REG_ADC_ATOP_BASE + 0x81) 235 #define REG_ADC_ATOP_41_L (REG_ADC_ATOP_BASE + 0x82) 236 #define REG_ADC_ATOP_41_H (REG_ADC_ATOP_BASE + 0x83) 237 #define REG_ADC_ATOP_42_L (REG_ADC_ATOP_BASE + 0x84) 238 #define REG_ADC_ATOP_42_H (REG_ADC_ATOP_BASE + 0x85) 239 #define REG_ADC_ATOP_43_L (REG_ADC_ATOP_BASE + 0x86) 240 #define REG_ADC_ATOP_43_H (REG_ADC_ATOP_BASE + 0x87) 241 #define REG_ADC_ATOP_44_L (REG_ADC_ATOP_BASE + 0x88) 242 #define REG_ADC_ATOP_44_H (REG_ADC_ATOP_BASE + 0x89) 243 #define REG_ADC_ATOP_45_L (REG_ADC_ATOP_BASE + 0x8A) 244 #define REG_ADC_ATOP_45_H (REG_ADC_ATOP_BASE + 0x8B) 245 #define REG_ADC_ATOP_46_L (REG_ADC_ATOP_BASE + 0x8C) 246 #define REG_ADC_ATOP_46_H (REG_ADC_ATOP_BASE + 0x8D) 247 #define REG_ADC_ATOP_47_L (REG_ADC_ATOP_BASE + 0x8E) 248 #define REG_ADC_ATOP_47_H (REG_ADC_ATOP_BASE + 0x8F) 249 #define REG_ADC_ATOP_48_L (REG_ADC_ATOP_BASE + 0x90) 250 #define REG_ADC_ATOP_48_H (REG_ADC_ATOP_BASE + 0x91) 251 #define REG_ADC_ATOP_49_L (REG_ADC_ATOP_BASE + 0x92) 252 #define REG_ADC_ATOP_49_H (REG_ADC_ATOP_BASE + 0x93) 253 #define REG_ADC_ATOP_4A_L (REG_ADC_ATOP_BASE + 0x94) 254 #define REG_ADC_ATOP_4A_H (REG_ADC_ATOP_BASE + 0x95) 255 #define REG_ADC_ATOP_4B_L (REG_ADC_ATOP_BASE + 0x96) 256 #define REG_ADC_ATOP_4B_H (REG_ADC_ATOP_BASE + 0x97) 257 #define REG_ADC_ATOP_4C_L (REG_ADC_ATOP_BASE + 0x98) 258 #define REG_ADC_ATOP_4C_H (REG_ADC_ATOP_BASE + 0x99) 259 #define REG_ADC_ATOP_4D_L (REG_ADC_ATOP_BASE + 0x9A) 260 #define REG_ADC_ATOP_4D_H (REG_ADC_ATOP_BASE + 0x9B) 261 #define REG_ADC_ATOP_4E_L (REG_ADC_ATOP_BASE + 0x9C) 262 #define REG_ADC_ATOP_4E_H (REG_ADC_ATOP_BASE + 0x9D) 263 #define REG_ADC_ATOP_4F_L (REG_ADC_ATOP_BASE + 0x9E) 264 #define REG_ADC_ATOP_4F_H (REG_ADC_ATOP_BASE + 0x9F) 265 #define REG_ADC_ATOP_50_L (REG_ADC_ATOP_BASE + 0xA0) 266 #define REG_ADC_ATOP_50_H (REG_ADC_ATOP_BASE + 0xA1) 267 #define REG_ADC_ATOP_51_L (REG_ADC_ATOP_BASE + 0xA2) 268 #define REG_ADC_ATOP_51_H (REG_ADC_ATOP_BASE + 0xA3) 269 #define REG_ADC_ATOP_52_L (REG_ADC_ATOP_BASE + 0xA4) 270 #define REG_ADC_ATOP_52_H (REG_ADC_ATOP_BASE + 0xA5) 271 #define REG_ADC_ATOP_53_L (REG_ADC_ATOP_BASE + 0xA6) 272 #define REG_ADC_ATOP_53_H (REG_ADC_ATOP_BASE + 0xA7) 273 #define REG_ADC_ATOP_54_L (REG_ADC_ATOP_BASE + 0xA8) 274 #define REG_ADC_ATOP_54_H (REG_ADC_ATOP_BASE + 0xA9) 275 #define REG_ADC_ATOP_55_L (REG_ADC_ATOP_BASE + 0xAA) 276 #define REG_ADC_ATOP_55_H (REG_ADC_ATOP_BASE + 0xAB) 277 #define REG_ADC_ATOP_56_L (REG_ADC_ATOP_BASE + 0xAC) 278 #define REG_ADC_ATOP_56_H (REG_ADC_ATOP_BASE + 0xAD) 279 #define REG_ADC_ATOP_57_L (REG_ADC_ATOP_BASE + 0xAE) 280 #define REG_ADC_ATOP_57_H (REG_ADC_ATOP_BASE + 0xAF) 281 #define REG_ADC_ATOP_58_L (REG_ADC_ATOP_BASE + 0xB0) 282 #define REG_ADC_ATOP_58_H (REG_ADC_ATOP_BASE + 0xB1) 283 #define REG_ADC_ATOP_59_L (REG_ADC_ATOP_BASE + 0xB2) 284 #define REG_ADC_ATOP_59_H (REG_ADC_ATOP_BASE + 0xB3) 285 #define REG_ADC_ATOP_5A_L (REG_ADC_ATOP_BASE + 0xB4) 286 #define REG_ADC_ATOP_5A_H (REG_ADC_ATOP_BASE + 0xB5) 287 #define REG_ADC_ATOP_5B_L (REG_ADC_ATOP_BASE + 0xB6) 288 #define REG_ADC_ATOP_5B_H (REG_ADC_ATOP_BASE + 0xB7) 289 #define REG_ADC_ATOP_5C_L (REG_ADC_ATOP_BASE + 0xB8) 290 #define REG_ADC_ATOP_5C_H (REG_ADC_ATOP_BASE + 0xB9) 291 #define REG_ADC_ATOP_5D_L (REG_ADC_ATOP_BASE + 0xBA) 292 #define REG_ADC_ATOP_5D_H (REG_ADC_ATOP_BASE + 0xBB) 293 #define REG_ADC_ATOP_5E_L (REG_ADC_ATOP_BASE + 0xBC) 294 #define REG_ADC_ATOP_5E_H (REG_ADC_ATOP_BASE + 0xBD) 295 #define REG_ADC_ATOP_5F_L (REG_ADC_ATOP_BASE + 0xBE) 296 #define REG_ADC_ATOP_5F_H (REG_ADC_ATOP_BASE + 0xBF) 297 #define REG_ADC_ATOP_60_L (REG_ADC_ATOP_BASE + 0xC0) 298 #define REG_ADC_ATOP_60_H (REG_ADC_ATOP_BASE + 0xC1) 299 #define REG_ADC_ATOP_61_L (REG_ADC_ATOP_BASE + 0xC2) 300 #define REG_ADC_ATOP_61_H (REG_ADC_ATOP_BASE + 0xC3) 301 #define REG_ADC_ATOP_62_L (REG_ADC_ATOP_BASE + 0xC4) 302 #define REG_ADC_ATOP_62_H (REG_ADC_ATOP_BASE + 0xC5) 303 #define REG_ADC_ATOP_63_L (REG_ADC_ATOP_BASE + 0xC6) 304 #define REG_ADC_ATOP_63_H (REG_ADC_ATOP_BASE + 0xC7) 305 #define REG_ADC_ATOP_64_L (REG_ADC_ATOP_BASE + 0xC8) 306 #define REG_ADC_ATOP_64_H (REG_ADC_ATOP_BASE + 0xC9) 307 #define REG_ADC_ATOP_65_L (REG_ADC_ATOP_BASE + 0xCA) 308 #define REG_ADC_ATOP_65_H (REG_ADC_ATOP_BASE + 0xCB) 309 #define REG_ADC_ATOP_66_L (REG_ADC_ATOP_BASE + 0xCC) 310 #define REG_ADC_ATOP_66_H (REG_ADC_ATOP_BASE + 0xCD) 311 #define REG_ADC_ATOP_67_L (REG_ADC_ATOP_BASE + 0xCE) 312 #define REG_ADC_ATOP_67_H (REG_ADC_ATOP_BASE + 0xCF) 313 #define REG_ADC_ATOP_68_L (REG_ADC_ATOP_BASE + 0xD0) 314 #define REG_ADC_ATOP_68_H (REG_ADC_ATOP_BASE + 0xD1) 315 #define REG_ADC_ATOP_69_L (REG_ADC_ATOP_BASE + 0xD2) 316 #define REG_ADC_ATOP_69_H (REG_ADC_ATOP_BASE + 0xD3) 317 #define REG_ADC_ATOP_6A_L (REG_ADC_ATOP_BASE + 0xD4) 318 #define REG_ADC_ATOP_6A_H (REG_ADC_ATOP_BASE + 0xD5) 319 #define REG_ADC_ATOP_6B_L (REG_ADC_ATOP_BASE + 0xD6) 320 #define REG_ADC_ATOP_6B_H (REG_ADC_ATOP_BASE + 0xD7) 321 #define REG_ADC_ATOP_6C_L (REG_ADC_ATOP_BASE + 0xD8) 322 #define REG_ADC_ATOP_6C_H (REG_ADC_ATOP_BASE + 0xD9) 323 #define REG_ADC_ATOP_6D_L (REG_ADC_ATOP_BASE + 0xDA) 324 #define REG_ADC_ATOP_6D_H (REG_ADC_ATOP_BASE + 0xDB) 325 #define REG_ADC_ATOP_6E_L (REG_ADC_ATOP_BASE + 0xDC) 326 #define REG_ADC_ATOP_6E_H (REG_ADC_ATOP_BASE + 0xDD) 327 #define REG_ADC_ATOP_6F_L (REG_ADC_ATOP_BASE + 0xDE) 328 #define REG_ADC_ATOP_6F_H (REG_ADC_ATOP_BASE + 0xDF) 329 #define REG_ADC_ATOP_70_L (REG_ADC_ATOP_BASE + 0xE0) 330 #define REG_ADC_ATOP_70_H (REG_ADC_ATOP_BASE + 0xE1) 331 #define REG_ADC_ATOP_71_L (REG_ADC_ATOP_BASE + 0xE2) 332 #define REG_ADC_ATOP_71_H (REG_ADC_ATOP_BASE + 0xE3) 333 #define REG_ADC_ATOP_72_L (REG_ADC_ATOP_BASE + 0xE4) 334 #define REG_ADC_ATOP_72_H (REG_ADC_ATOP_BASE + 0xE5) 335 #define REG_ADC_ATOP_73_L (REG_ADC_ATOP_BASE + 0xE6) 336 #define REG_ADC_ATOP_73_H (REG_ADC_ATOP_BASE + 0xE7) 337 #define REG_ADC_ATOP_74_L (REG_ADC_ATOP_BASE + 0xE8) 338 #define REG_ADC_ATOP_74_H (REG_ADC_ATOP_BASE + 0xE9) 339 #define REG_ADC_ATOP_75_L (REG_ADC_ATOP_BASE + 0xEA) 340 #define REG_ADC_ATOP_75_H (REG_ADC_ATOP_BASE + 0xEB) 341 #define REG_ADC_ATOP_76_L (REG_ADC_ATOP_BASE + 0xEC) 342 #define REG_ADC_ATOP_76_H (REG_ADC_ATOP_BASE + 0xED) 343 #define REG_ADC_ATOP_77_L (REG_ADC_ATOP_BASE + 0xEE) 344 #define REG_ADC_ATOP_77_H (REG_ADC_ATOP_BASE + 0xEF) 345 #define REG_ADC_ATOP_78_L (REG_ADC_ATOP_BASE + 0xF0) 346 #define REG_ADC_ATOP_78_H (REG_ADC_ATOP_BASE + 0xF1) 347 #define REG_ADC_ATOP_79_L (REG_ADC_ATOP_BASE + 0xF2) 348 #define REG_ADC_ATOP_79_H (REG_ADC_ATOP_BASE + 0xF3) 349 #define REG_ADC_ATOP_7A_L (REG_ADC_ATOP_BASE + 0xF4) 350 #define REG_ADC_ATOP_7A_H (REG_ADC_ATOP_BASE + 0xF5) 351 #define REG_ADC_ATOP_7B_L (REG_ADC_ATOP_BASE + 0xF6) 352 #define REG_ADC_ATOP_7B_H (REG_ADC_ATOP_BASE + 0xF7) 353 #define REG_ADC_ATOP_7C_L (REG_ADC_ATOP_BASE + 0xF8) 354 #define REG_ADC_ATOP_7C_H (REG_ADC_ATOP_BASE + 0xF9) 355 #define REG_ADC_ATOP_7D_L (REG_ADC_ATOP_BASE + 0xFA) 356 #define REG_ADC_ATOP_7D_H (REG_ADC_ATOP_BASE + 0xFB) 357 #define REG_ADC_ATOP_7E_L (REG_ADC_ATOP_BASE + 0xFC) 358 #define REG_ADC_ATOP_7E_H (REG_ADC_ATOP_BASE + 0xFD) 359 #define REG_ADC_ATOP_7F_L (REG_ADC_ATOP_BASE + 0xFE) 360 #define REG_ADC_ATOP_7F_H (REG_ADC_ATOP_BASE + 0xFF) 361 362 #define REG_ADC_ATOPB_00_L (REG_ADC_ATOPB_BASE + 0x00) 363 #define REG_ADC_ATOPB_00_H (REG_ADC_ATOPB_BASE + 0x01) 364 #define REG_ADC_ATOPB_08_L (REG_ADC_ATOPB_BASE + 0x10) 365 #define REG_ADC_ATOPB_08_H (REG_ADC_ATOPB_BASE + 0x11) 366 367 // Einstein new 368 #define REG_ADC_AFEC_7A_L (REG_AFEC_BASE + 0xF4) 369 #define REG_ADC_AFEC_7A_H (REG_AFEC_BASE + 0xF5) 370 371 #define REG_ADC_COMB_47_L (REG_COMB_BASE + 0x8E) 372 #define REG_ADC_COMB_47_H (REG_COMB_BASE + 0x8F) 373 374 #define REG_ADC_CHIPTOP_12_L (REG_ADC_CHIPTOP_BASE + 0x24) 375 #define REG_ADC_CHIPTOP_12_H (REG_ADC_CHIPTOP_BASE + 0x25) 376 377 #define REG_ADC_CLKGEN0_20_L (REG_CLKGEN0_BASE + 0x40) 378 #define REG_ADC_CLKGEN0_20_H (REG_CLKGEN0_BASE + 0x41) 379 #define REG_ADC_CLKGEN0_26_L (REG_CLKGEN0_BASE + 0x4C) 380 #define REG_ADC_CLKGEN0_26_H (REG_CLKGEN0_BASE + 0x4D) 381 382 383 #endif 384 385