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Searched refs:LPLL_BK_RESTORE (Results 1 – 25 of 33) sorted by relevance

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/utopia/UTPA2-700.0.x/modules/xc/drv/xc/
H A Dmdrv_sc_display.c1204 LPLL_BK_RESTORE; in MDrv_SC_Cal_FRC_Output_Vfreq()
1390 LPLL_BK_RESTORE; in MDrv_SC_set_fpll()
2404 LPLL_BK_RESTORE; in _MDrv_Scaler_SetIGainPGain()
3013 LPLL_BK_RESTORE; in _MDrv_XC_Set_FPLL_Thresh_Mode()
3411 LPLL_BK_RESTORE; in MDrv_Scaler_SetPhaseLimit()
3576 LPLL_BK_RESTORE; in MDrv_SC_Set_Output_Dclk_Slowly()
3604 LPLL_BK_RESTORE; in MDrv_Scaler_GetLPLLPhaseOfs()
3614 LPLL_BK_RESTORE; in MDrv_Scaler_GetLPLLPrdOfs()
3661 LPLL_BK_RESTORE; in MDrv_Scaler_IsPRDLock()
3695 LPLL_BK_RESTORE; in MDrv_Scaler_IsPhaseStable()
[all …]
H A Dmdrv_sc_display.c.01202 LPLL_BK_RESTORE;
1388 LPLL_BK_RESTORE;
2402 LPLL_BK_RESTORE;
3011 LPLL_BK_RESTORE;
3409 LPLL_BK_RESTORE;
3574 LPLL_BK_RESTORE;
3602 LPLL_BK_RESTORE;
3612 LPLL_BK_RESTORE;
3659 LPLL_BK_RESTORE;
3693 LPLL_BK_RESTORE;
[all …]
/utopia/UTPA2-700.0.x/modules/xc/hal/mustang/xc/
H A Dmhal_sc.c2544 LPLL_BK_RESTORE; in HAL_SC_EnableFPLL()
2557 LPLL_BK_RESTORE; in _HAL_SC_GetFPLLPhaseDiffISR()
2599 LPLL_BK_RESTORE; in HAL_SC_GetOutputVFreqX100()
2805 LPLL_BK_RESTORE; in HAL_SC_Set_FPLL_Limit()
/utopia/UTPA2-700.0.x/modules/xc/hal/maldives/xc/
H A Dmhal_sc.c2564 LPLL_BK_RESTORE; in HAL_SC_EnableFPLL()
2577 LPLL_BK_RESTORE; in _HAL_SC_GetFPLLPhaseDiffISR()
2619 LPLL_BK_RESTORE; in HAL_SC_GetOutputVFreqX100()
2825 LPLL_BK_RESTORE; in HAL_SC_Set_FPLL_Limit()
/utopia/UTPA2-700.0.x/modules/xc/hal/maldives/xc/include/
H A Dmhal_xc_chip_config.h460 #define LPLL_BK_RESTORE macro
/utopia/UTPA2-700.0.x/modules/xc/hal/mustang/xc/include/
H A Dmhal_xc_chip_config.h460 #define LPLL_BK_RESTORE macro
/utopia/UTPA2-700.0.x/modules/xc/hal/mainz/xc/include/
H A Dmhal_xc_chip_config.h587 #define LPLL_BK_RESTORE MDrv_WriteByte(REG_LPLL_BASE, u8Bank) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/messi/xc/include/
H A Dmhal_xc_chip_config.h585 #define LPLL_BK_RESTORE MDrv_WriteByte(REG_LPLL_BASE, u8Bank) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/curry/xc/include/
H A Dmhal_xc_chip_config.h604 #define LPLL_BK_RESTORE macro
/utopia/UTPA2-700.0.x/modules/xc/hal/kano/xc/include/
H A Dmhal_xc_chip_config.h610 #define LPLL_BK_RESTORE macro
/utopia/UTPA2-700.0.x/modules/xc/hal/k6/xc/include/
H A Dmhal_xc_chip_config.h610 #define LPLL_BK_RESTORE macro
/utopia/UTPA2-700.0.x/modules/xc/hal/k6lite/xc/include/
H A Dmhal_xc_chip_config.h612 #define LPLL_BK_RESTORE macro
H A Dmhal_xc_chip_config.h.0611 #define LPLL_BK_RESTORE
/utopia/UTPA2-700.0.x/modules/xc/hal/mooney/xc/include/
H A Dmhal_xc_chip_config.h568 #define LPLL_BK_RESTORE MDrv_WriteByte(REG_LPLL_BASE, u8Bank) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/M7621/xc/include/
H A Dmhal_xc_chip_config.h668 #define LPLL_BK_RESTORE MDrv_WriteByte(REG_LPLL_BASE, u8Bank) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/manhattan/xc/include/
H A Dmhal_xc_chip_config.h628 #define LPLL_BK_RESTORE MDrv_WriteByte(REG_LPLL_BASE, u8Bank) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/M7821/xc/include/
H A Dmhal_xc_chip_config.h680 #define LPLL_BK_RESTORE MDrv_WriteByte(REG_LPLL_BASE, u8Bank) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/macan/xc/include/
H A Dmhal_xc_chip_config.h618 #define LPLL_BK_RESTORE MDrv_WriteByte(REG_LPLL_BASE, u8Bank) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/maserati/xc/include/
H A Dmhal_xc_chip_config.h685 #define LPLL_BK_RESTORE MDrv_WriteByte(REG_LPLL_BASE, u8Bank) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/maxim/xc/include/
H A Dmhal_xc_chip_config.h672 #define LPLL_BK_RESTORE MDrv_WriteByte(REG_LPLL_BASE, u8Bank) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/messi/xc/
H A Dmhal_sc.c3954 LPLL_BK_RESTORE; in _MHal_SC_Flock_Caculate_LPLLSet()
3972 LPLL_BK_RESTORE; in _MHal_SC_Set_LPLL_Limit()
4016 LPLL_BK_RESTORE; in _MHal_SC_Flock_Set_IGainPGain()
4042 LPLL_BK_RESTORE; in _MHal_SC_Flock_Set_LPLL_Enable()
/utopia/UTPA2-700.0.x/modules/xc/hal/mainz/xc/
H A Dmhal_sc.c4090 LPLL_BK_RESTORE; in _MHal_SC_Flock_Caculate_LPLLSet()
4108 LPLL_BK_RESTORE; in _MHal_SC_Set_LPLL_Limit()
4152 LPLL_BK_RESTORE; in _MHal_SC_Flock_Set_IGainPGain()
4178 LPLL_BK_RESTORE; in _MHal_SC_Flock_Set_LPLL_Enable()
/utopia/UTPA2-700.0.x/modules/xc/hal/mooney/xc/
H A Dmhal_sc.c4876 LPLL_BK_RESTORE; in _MHal_SC_Flock_Caculate_LPLLSet()
4894 LPLL_BK_RESTORE; in _MHal_SC_Set_LPLL_Limit()
4938 LPLL_BK_RESTORE; in _MHal_SC_Flock_Set_IGainPGain()
4964 LPLL_BK_RESTORE; in _MHal_SC_Flock_Set_LPLL_Enable()
/utopia/UTPA2-700.0.x/modules/xc/hal/macan/xc/
H A Dmhal_sc.c5482 LPLL_BK_RESTORE; in _MHal_SC_Flock_Caculate_LPLLSet()
5501 LPLL_BK_RESTORE; in _MHal_SC_Set_LPLL_Limit()
5546 LPLL_BK_RESTORE; in _MHal_SC_Flock_Set_IGainPGain()
5574 LPLL_BK_RESTORE; in _MHal_SC_Flock_Set_LPLL_Enable()
/utopia/UTPA2-700.0.x/modules/xc/hal/manhattan/xc/
H A Dmhal_sc.c5543 LPLL_BK_RESTORE; in _MHal_SC_Flock_Caculate_LPLLSet()
5562 LPLL_BK_RESTORE; in _MHal_SC_Set_LPLL_Limit()
5607 LPLL_BK_RESTORE; in _MHal_SC_Flock_Set_IGainPGain()
5635 LPLL_BK_RESTORE; in _MHal_SC_Flock_Set_LPLL_Enable()

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