| /utopia/UTPA2-700.0.x/modules/dmx/hal/macan/fq/ |
| H A D | halFQ.c | 269 return _HAL_REG16_R(&(_REGFIQ[u32FQEng].Reg_fiq_config16)) & FIQ_CFG16_INT_STATUS_MASK; in HAL_FQ_INT_GetHW() 274 …, _CLR_(_HAL_REG16_R(&(_REGFIQ[u32FQEng].Reg_fiq_config16)), u16Mask & FIQ_CFG16_INT_STATUS_MASK)); in HAL_FQ_INT_ClrHW()
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| H A D | regFQ.h | 174 #define FIQ_CFG16_INT_STATUS_MASK 0xFF00 macro
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| /utopia/UTPA2-700.0.x/modules/dmx/hal/manhattan/fq/ |
| H A D | halFQ.c | 273 return _HAL_REG16_R(&(_REGFIQ[u32FQEng].Reg_fiq_config16)) & FIQ_CFG16_INT_STATUS_MASK; in HAL_FQ_INT_GetHW() 278 …, _CLR_(_HAL_REG16_R(&(_REGFIQ[u32FQEng].Reg_fiq_config16)), u16Mask & FIQ_CFG16_INT_STATUS_MASK)); in HAL_FQ_INT_ClrHW()
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| H A D | regFQ.h | 174 #define FIQ_CFG16_INT_STATUS_MASK 0xFF00 macro
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| /utopia/UTPA2-700.0.x/modules/dmx/hal/kano/fq/ |
| H A D | halFQ.c | 262 return _HAL_REG16_R(&(_REGFIQ[u32FQEng].Reg_fiq_config16)) & FIQ_CFG16_INT_STATUS_MASK; in HAL_FQ_INT_GetHW() 267 …, _CLR_(_HAL_REG16_R(&(_REGFIQ[u32FQEng].Reg_fiq_config16)), u16Mask & FIQ_CFG16_INT_STATUS_MASK)); in HAL_FQ_INT_ClrHW()
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| H A D | regFQ.h | 185 #define FIQ_CFG16_INT_STATUS_MASK 0xFF00 macro
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| /utopia/UTPA2-700.0.x/modules/dmx/hal/k6lite/fq/ |
| H A D | halFQ.c | 261 return _HAL_REG16_R(&(_REGFIQ[u32FQEng].Reg_fiq_config16)) & FIQ_CFG16_INT_STATUS_MASK; in HAL_FQ_INT_GetHW() 266 …, _CLR_(_HAL_REG16_R(&(_REGFIQ[u32FQEng].Reg_fiq_config16)), u16Mask & FIQ_CFG16_INT_STATUS_MASK)); in HAL_FQ_INT_ClrHW()
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| H A D | regFQ.h | 195 #define FIQ_CFG16_INT_STATUS_MASK 0xFF00 macro
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| /utopia/UTPA2-700.0.x/modules/dmx/hal/k6/fq/ |
| H A D | halFQ.c | 261 return _HAL_REG16_R(&(_REGFIQ[u32FQEng].Reg_fiq_config16)) & FIQ_CFG16_INT_STATUS_MASK; in HAL_FQ_INT_GetHW() 266 …, _CLR_(_HAL_REG16_R(&(_REGFIQ[u32FQEng].Reg_fiq_config16)), u16Mask & FIQ_CFG16_INT_STATUS_MASK)); in HAL_FQ_INT_ClrHW()
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| H A D | regFQ.h | 193 #define FIQ_CFG16_INT_STATUS_MASK 0xFF00 macro
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| /utopia/UTPA2-700.0.x/modules/dmx/hal/curry/fq/ |
| H A D | halFQ.c | 284 return _HAL_REG16_R(&(_REGFIQ[u32FQEng].Reg_fiq_config16)) & FIQ_CFG16_INT_STATUS_MASK; in HAL_FQ_INT_GetHW() 289 …, _CLR_(_HAL_REG16_R(&(_REGFIQ[u32FQEng].Reg_fiq_config16)), u16Mask & FIQ_CFG16_INT_STATUS_MASK)); in HAL_FQ_INT_ClrHW()
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| H A D | regFQ.h | 185 #define FIQ_CFG16_INT_STATUS_MASK 0xFF00 macro
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| /utopia/UTPA2-700.0.x/modules/dmx/hal/M7621/fq/ |
| H A D | halFQ.c | 327 return _HAL_REG16_R(&(_REGFIQ[u32FQEng].Reg_fiq_config16)) & FIQ_CFG16_INT_STATUS_MASK; 332 …, _CLR_(_HAL_REG16_R(&(_REGFIQ[u32FQEng].Reg_fiq_config16)), u16Mask & FIQ_CFG16_INT_STATUS_MASK));
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| H A D | regFQ.h | 188 #define FIQ_CFG16_INT_STATUS_MASK 0xFF00 macro
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| /utopia/UTPA2-700.0.x/modules/dmx/hal/maxim/fq/ |
| H A D | halFQ.c | 327 return _HAL_REG16_R(&(_REGFIQ[u32FQEng].Reg_fiq_config16)) & FIQ_CFG16_INT_STATUS_MASK; 332 …, _CLR_(_HAL_REG16_R(&(_REGFIQ[u32FQEng].Reg_fiq_config16)), u16Mask & FIQ_CFG16_INT_STATUS_MASK));
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| H A D | regFQ.h | 188 #define FIQ_CFG16_INT_STATUS_MASK 0xFF00 macro
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| /utopia/UTPA2-700.0.x/modules/dmx/hal/M7821/fq/ |
| H A D | halFQ.c | 327 return _HAL_REG16_R(&(_REGFIQ[u32FQEng].Reg_fiq_config16)) & FIQ_CFG16_INT_STATUS_MASK; 332 …, _CLR_(_HAL_REG16_R(&(_REGFIQ[u32FQEng].Reg_fiq_config16)), u16Mask & FIQ_CFG16_INT_STATUS_MASK));
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| H A D | regFQ.h | 188 #define FIQ_CFG16_INT_STATUS_MASK 0xFF00 macro
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| /utopia/UTPA2-700.0.x/modules/dmx/hal/maserati/fq/ |
| H A D | halFQ.c | 327 return _HAL_REG16_R(&(_REGFIQ[u32FQEng].Reg_fiq_config16)) & FIQ_CFG16_INT_STATUS_MASK; 332 …, _CLR_(_HAL_REG16_R(&(_REGFIQ[u32FQEng].Reg_fiq_config16)), u16Mask & FIQ_CFG16_INT_STATUS_MASK));
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| H A D | regFQ.h | 188 #define FIQ_CFG16_INT_STATUS_MASK 0xFF00 macro
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