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Searched refs:CKG_FMCLK_GATED (Results 1 – 25 of 27) sorted by relevance

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/utopia/UTPA2-700.0.x/modules/xc/hal/mainz/xc/
H A Dmhal_dip.c2251 MDrv_WriteByteMask(REG_CKG_FMCLK, 0x0, CKG_FMCLK_GATED); in HAL_XC_DIP_Rotation()
2257 MDrv_WriteByteMask(REG_CKG_FMCLK, 0x0, CKG_FMCLK_GATED); in HAL_XC_DIP_Rotation()
/utopia/UTPA2-700.0.x/modules/xc/hal/messi/xc/
H A Dmhal_dip.c2231 MDrv_WriteByteMask(REG_CKG_FMCLK, 0x0, CKG_FMCLK_GATED); in HAL_XC_DIP_Rotation()
2237 MDrv_WriteByteMask(REG_CKG_FMCLK, 0x0, CKG_FMCLK_GATED); in HAL_XC_DIP_Rotation()
/utopia/UTPA2-700.0.x/modules/xc/hal/curry/xc/include/
H A Dmhal_xc_chip_config.h640 #define CKG_FMCLK_GATED BIT(0) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/kano/xc/include/
H A Dmhal_xc_chip_config.h646 #define CKG_FMCLK_GATED BIT(0) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/k6/xc/include/
H A Dmhal_xc_chip_config.h646 #define CKG_FMCLK_GATED BIT(0) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/k6lite/xc/include/
H A Dmhal_xc_chip_config.h648 #define CKG_FMCLK_GATED BIT(0) macro
H A Dmhal_xc_chip_config.h.0647 #define CKG_FMCLK_GATED BIT(0)
/utopia/UTPA2-700.0.x/modules/xc/hal/mooney/xc/include/
H A Dmhal_xc_chip_config.h622 #define CKG_FMCLK_GATED BIT(0) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/mooney/xc/
H A Dmhal_dip.c2318 MDrv_WriteByteMask(REG_CKG_FMCLK, 0x0, CKG_FMCLK_GATED); in HAL_XC_DIP_Rotation()
2324 MDrv_WriteByteMask(REG_CKG_FMCLK, 0x0, CKG_FMCLK_GATED); in HAL_XC_DIP_Rotation()
H A Dmhal_sc.c6327 MDrv_WriteByteMask(REG_CKG_FMCLK, DISABLE, CKG_FMCLK_GATED); in Hal_SC_set_fmclk()
6332 MDrv_WriteByteMask(REG_CKG_FMCLK, ENABLE, CKG_FMCLK_GATED); // disable clock in Hal_SC_set_fmclk()
/utopia/UTPA2-700.0.x/modules/xc/hal/M7621/xc/include/
H A Dmhal_xc_chip_config.h722 #define CKG_FMCLK_GATED BIT(0) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/manhattan/xc/include/
H A Dmhal_xc_chip_config.h682 #define CKG_FMCLK_GATED BIT(0) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/M7821/xc/include/
H A Dmhal_xc_chip_config.h734 #define CKG_FMCLK_GATED BIT(0) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/macan/xc/include/
H A Dmhal_xc_chip_config.h672 #define CKG_FMCLK_GATED BIT(0) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/maserati/xc/include/
H A Dmhal_xc_chip_config.h739 #define CKG_FMCLK_GATED BIT(0) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/maxim/xc/include/
H A Dmhal_xc_chip_config.h726 #define CKG_FMCLK_GATED BIT(0) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/manhattan/xc/
H A Dmhal_dip.c2494 MDrv_WriteByteMask(REG_CKG_FMCLK, 0x0, CKG_FMCLK_GATED); in HAL_XC_DIP_Rotation()
2500 MDrv_WriteByteMask(REG_CKG_FMCLK, 0x0, CKG_FMCLK_GATED); in HAL_XC_DIP_Rotation()
H A Dmhal_sc.c7088 MDrv_WriteByteMask(REG_CKG_FMCLK, DISABLE, CKG_FMCLK_GATED); in Hal_SC_set_fmclk()
7093 MDrv_WriteByteMask(REG_CKG_FMCLK, ENABLE, CKG_FMCLK_GATED); // disable clock in Hal_SC_set_fmclk()
/utopia/UTPA2-700.0.x/modules/xc/hal/maserati/xc/
H A Dmhal_dip.c3130 MDrv_DIP_WriteByteMask(REG_CKG_FMCLK, 0x0, CKG_FMCLK_GATED); in HAL_XC_DIP_Rotation()
3136 MDrv_DIP_WriteByteMask(REG_CKG_FMCLK, 0x0, CKG_FMCLK_GATED); in HAL_XC_DIP_Rotation()
/utopia/UTPA2-700.0.x/modules/xc/hal/M7621/xc/
H A Dmhal_dip.c3081 MDrv_DIP_WriteByteMask(REG_CKG_FMCLK, 0x0, CKG_FMCLK_GATED); in HAL_XC_DIP_Rotation()
3087 MDrv_DIP_WriteByteMask(REG_CKG_FMCLK, 0x0, CKG_FMCLK_GATED); in HAL_XC_DIP_Rotation()
H A Dmhal_sc.c7618 MDrv_WriteByteMask(REG_CKG_FMCLK, DISABLE, CKG_FMCLK_GATED); in Hal_SC_set_fmclk()
7623 MDrv_WriteByteMask(REG_CKG_FMCLK, ENABLE, CKG_FMCLK_GATED); // disable clock in Hal_SC_set_fmclk()
/utopia/UTPA2-700.0.x/modules/xc/hal/M7821/xc/
H A Dmhal_dip.c3132 MDrv_DIP_WriteByteMask(REG_CKG_FMCLK, 0x0, CKG_FMCLK_GATED); in HAL_XC_DIP_Rotation()
3138 MDrv_DIP_WriteByteMask(REG_CKG_FMCLK, 0x0, CKG_FMCLK_GATED); in HAL_XC_DIP_Rotation()
/utopia/UTPA2-700.0.x/modules/xc/hal/maxim/xc/
H A Dmhal_dip.c3085 MDrv_DIP_WriteByteMask(REG_CKG_FMCLK, 0x0, CKG_FMCLK_GATED); in HAL_XC_DIP_Rotation()
3091 MDrv_DIP_WriteByteMask(REG_CKG_FMCLK, 0x0, CKG_FMCLK_GATED); in HAL_XC_DIP_Rotation()
H A Dmhal_sc.c7641 MDrv_WriteByteMask(REG_CKG_FMCLK, DISABLE, CKG_FMCLK_GATED); in Hal_SC_set_fmclk()
7646 MDrv_WriteByteMask(REG_CKG_FMCLK, ENABLE, CKG_FMCLK_GATED); // disable clock in Hal_SC_set_fmclk()
/utopia/UTPA2-700.0.x/modules/xc/hal/macan/xc/
H A Dmhal_sc.c7050 MDrv_WriteByteMask(REG_CKG_FMCLK, DISABLE, CKG_FMCLK_GATED); in Hal_SC_set_fmclk()
7055 MDrv_WriteByteMask(REG_CKG_FMCLK, ENABLE, CKG_FMCLK_GATED); // disable clock in Hal_SC_set_fmclk()

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