| /utopia/UTPA2-700.0.x/modules/mvop/hal/k6/mvop/ |
| H A D | halMVOP.c | 783 …HAL_WriteByteMask(REG_CKG_DC_SRAM, 0x4, CKG_DC0_SRAM);//Dc0 enable & dc0_mfdec_en =0 57[3:0]= 0x4… in HAL_MVOP_SetOutputInterlace()
1520 …HAL_WriteByteMask(REG_CKG_DC_SRAM, 0x4, CKG_DC0_SRAM);//Dc0 enable & dc0_mfdec_en =0 57[3:0]= 0x4… in HAL_MVOP_SetDCSRAMClk()
1524 HAL_WriteByteMask(REG_CKG_DC_SRAM, 0x0, CKG_DC0_SRAM); in HAL_MVOP_SetDCSRAMClk()
1531 HAL_WriteByteMask(REG_CKG_DC_SRAM, 0x0, CKG_DC0_SRAM); in HAL_MVOP_SetDCSRAMClk()
1661 …HAL_WriteByteMask(REG_CKG_DC_SRAM, 0x0, CKG_DC0_SRAM);//Dc0 enable & dc0_mfdec_en =0 57[3:0]= 0x4… in HAL_MVOP_SetH264HardwireMode()
1675 …HAL_WriteByteMask(REG_CKG_DC_SRAM, 0x4, CKG_DC0_SRAM);//Dc0 enable & dc0_mfdec_en =0 57[3:0]= 0x4… in HAL_MVOP_SetRMHardwireMode()
1731 …HAL_WriteByteMask(REG_CKG_DC_SRAM, 0x0, CKG_DC0_SRAM);//Dc0 enable & dc0_mfdec_en =0 57[3:0]= 0x4… in HAL_MVOP_SetEVDHardwireMode()
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| H A D | regMVOP.h | 490 #define CKG_DC0_SRAM (BIT3 | BIT2 | BIT1 | BIT0) macro
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| /utopia/UTPA2-700.0.x/modules/mvop/hal/mustang/mvop/ |
| H A D | regMVOP.h | 385 #define CKG_DC0_SRAM BIT0 macro
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| H A D | halMVOP.c | 1316 HAL_WriteRegBit(REG_CKG_DC_SRAM, !bEnable, CKG_DC0_SRAM); in HAL_MVOP_SetDCSRAMClk()
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| /utopia/UTPA2-700.0.x/modules/mvop/hal/macan/mvop/ |
| H A D | regMVOP.h | 404 #define CKG_DC0_SRAM BIT0 macro
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| /utopia/UTPA2-700.0.x/modules/mvop/hal/messi/mvop/ |
| H A D | regMVOP.h | 405 #define CKG_DC0_SRAM BIT0 macro
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| /utopia/UTPA2-700.0.x/modules/mvop/hal/manhattan/mvop/ |
| H A D | regMVOP.h | 398 #define CKG_DC0_SRAM BIT0 macro
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| H A D | halMVOP.c | 1407 HAL_WriteRegBit(REG_CKG_DC_SRAM, !bEnable, CKG_DC0_SRAM); in HAL_MVOP_SetDCSRAMClk()
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| /utopia/UTPA2-700.0.x/modules/mvop/hal/M7821/mvop/ |
| H A D | regMVOP.h | 407 #define CKG_DC0_SRAM BIT0 macro
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| /utopia/UTPA2-700.0.x/modules/mvop/hal/mainz/mvop/ |
| H A D | regMVOP.h | 405 #define CKG_DC0_SRAM BIT0 macro
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| /utopia/UTPA2-700.0.x/modules/mvop/hal/mooney/mvop/ |
| H A D | regMVOP.h | 423 #define CKG_DC0_SRAM BIT0 macro
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| H A D | halMVOP.c | 1427 HAL_WriteRegBit(REG_CKG_DC_SRAM, !bEnable, CKG_DC0_SRAM); in HAL_MVOP_SetDCSRAMClk()
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| /utopia/UTPA2-700.0.x/modules/mvop/hal/maserati/mvop/ |
| H A D | regMVOP.h | 408 #define CKG_DC0_SRAM BIT0 macro
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| H A D | halMVOP.c | 1499 HAL_WriteRegBit(REG_CKG_DC_SRAM, !bEnable, CKG_DC0_SRAM); in HAL_MVOP_SetDCSRAMClk()
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| /utopia/UTPA2-700.0.x/modules/mvop/hal/M7621/mvop/ |
| H A D | regMVOP.h | 420 #define CKG_DC0_SRAM BIT0 macro
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| H A D | halMVOP.c | 1500 HAL_WriteRegBit(REG_CKG_DC_SRAM, !bEnable, CKG_DC0_SRAM); in HAL_MVOP_SetDCSRAMClk()
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| /utopia/UTPA2-700.0.x/modules/mvop/hal/M5621/mvop/ |
| H A D | regMVOP.h | 414 #define CKG_DC0_SRAM BIT0 macro
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| H A D | halMVOP.c | 1380 HAL_WriteRegBit(REG_CKG_DC_SRAM, !bEnable, CKG_DC0_SRAM); in HAL_MVOP_SetDCSRAMClk()
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| /utopia/UTPA2-700.0.x/modules/mvop/hal/kastor/mvop/ |
| H A D | regMVOP.h | 437 #define CKG_DC0_SRAM BIT0 macro
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| /utopia/UTPA2-700.0.x/modules/mvop/hal/curry/mvop/ |
| H A D | regMVOP.h | 434 #define CKG_DC0_SRAM BIT0 macro
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| /utopia/UTPA2-700.0.x/modules/mvop/hal/kano/mvop/ |
| H A D | regMVOP.h | 435 #define CKG_DC0_SRAM BIT0 macro
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| /utopia/UTPA2-700.0.x/modules/mvop/hal/k6lite/mvop/ |
| H A D | regMVOP.h | 427 #define CKG_DC0_SRAM (BIT3 | BIT2 | BIT1 | BIT0) macro
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| H A D | halMVOP.c | 1504 …HAL_WriteByteMask(REG_CKG_DC_SRAM, 0x4, CKG_DC0_SRAM);//Dc0 enable & dc0_mfdec_en =0 57[3:0]= 0x4… in HAL_MVOP_SetDCSRAMClk()
1506 HAL_WriteByteMask(REG_CKG_DC_SRAM, 0x0, CKG_DC0_SRAM); in HAL_MVOP_SetDCSRAMClk()
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| /utopia/UTPA2-700.0.x/modules/mvop/hal/maxim/mvop/ |
| H A D | regMVOP.h | 420 #define CKG_DC0_SRAM BIT0 macro
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| /utopia/UTPA2-700.0.x/modules/mvop/hal/k7u/mvop/ |
| H A D | regMVOP.h | 449 #define CKG_DC0_SRAM (BIT3 | BIT2 | BIT1 | BIT0) macro
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