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Searched refs:CFG8_48_REG_PS_MODE_SRC_V3_MASK (Results 1 – 6 of 6) sorted by relevance

/utopia/UTPA2-700.0.x/modules/dscmb/hal/k6/nsk2/
H A DregTSP.h2533 #define CFG8_48_REG_PS_MODE_SRC_V3_MASK 0x0700 macro
/utopia/UTPA2-700.0.x/modules/dscmb/hal/k6lite/nsk2/
H A DregTSP.h2654 #define CFG8_48_REG_PS_MODE_SRC_V3_MASK 0x0700 macro
/utopia/UTPA2-700.0.x/modules/dscmb/hal/k7u/nsk2/
H A DregTSP.h2654 #define CFG8_48_REG_PS_MODE_SRC_V3_MASK 0x0700 macro
/utopia/UTPA2-700.0.x/modules/dmx/hal/k6/tsp/
H A DregTSP.h2627 #define CFG8_48_REG_PS_MODE_SRC_V3_MASK 0x0700 macro
H A DhalTSP.c4463 …REG16_MSK_W(&_RegCtrl8_1->CFG8_48,CFG8_48_REG_PS_MODE_SRC_V3_MASK, (eFileEng << CFG8_48_REG_PS_MOD… in HAL_TSP_FIFO_Bypass_Src()
/utopia/UTPA2-700.0.x/modules/dmx/hal/k6lite/tsp/
H A DregTSP.h2692 #define CFG8_48_REG_PS_MODE_SRC_V3_MASK 0x0700 macro