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Searched refs:reg_rc (Results 1 – 4 of 4) sorted by relevance

/rockchip-linux_mpp/mpp/hal/rkenc/h265e/
H A Dhal_h265e_vepu511.c1262 Vepu511RcRoi *reg_rc = &regs->reg_rc_roi; in vepu511_h265_set_rc_regs() local
1324 reg_rc->rc_dthd_0_8[0] = 2 * negative_bits_thd; in vepu511_h265_set_rc_regs()
1325 reg_rc->rc_dthd_0_8[1] = negative_bits_thd; in vepu511_h265_set_rc_regs()
1326 reg_rc->rc_dthd_0_8[2] = positive_bits_thd; in vepu511_h265_set_rc_regs()
1327 reg_rc->rc_dthd_0_8[3] = 2 * positive_bits_thd; in vepu511_h265_set_rc_regs()
1328 reg_rc->rc_dthd_0_8[4] = 0x7FFFFFFF; in vepu511_h265_set_rc_regs()
1329 reg_rc->rc_dthd_0_8[5] = 0x7FFFFFFF; in vepu511_h265_set_rc_regs()
1330 reg_rc->rc_dthd_0_8[6] = 0x7FFFFFFF; in vepu511_h265_set_rc_regs()
1331 reg_rc->rc_dthd_0_8[7] = 0x7FFFFFFF; in vepu511_h265_set_rc_regs()
1332 reg_rc->rc_dthd_0_8[8] = 0x7FFFFFFF; in vepu511_h265_set_rc_regs()
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H A Dhal_h265e_vepu540c.c711 hevc_vepu540c_rc_roi *reg_rc = &regs->reg_rc_roi; in vepu540c_h265_set_rc_regs() local
749 reg_rc->rc_dthd_0_8[0] = 4 * negative_bits_thd; in vepu540c_h265_set_rc_regs()
750 reg_rc->rc_dthd_0_8[1] = negative_bits_thd; in vepu540c_h265_set_rc_regs()
751 reg_rc->rc_dthd_0_8[2] = positive_bits_thd; in vepu540c_h265_set_rc_regs()
752 reg_rc->rc_dthd_0_8[3] = 4 * positive_bits_thd; in vepu540c_h265_set_rc_regs()
753 reg_rc->rc_dthd_0_8[4] = 0x7FFFFFFF; in vepu540c_h265_set_rc_regs()
754 reg_rc->rc_dthd_0_8[5] = 0x7FFFFFFF; in vepu540c_h265_set_rc_regs()
755 reg_rc->rc_dthd_0_8[6] = 0x7FFFFFFF; in vepu540c_h265_set_rc_regs()
756 reg_rc->rc_dthd_0_8[7] = 0x7FFFFFFF; in vepu540c_h265_set_rc_regs()
757 reg_rc->rc_dthd_0_8[8] = 0x7FFFFFFF; in vepu540c_h265_set_rc_regs()
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H A Dhal_h265e_vepu510.c1302 Vepu510RcRoi *reg_rc = &regs->reg_rc_roi; in vepu510_h265_set_rc_regs() local
1363 reg_rc->rc_dthd_0_8[0] = 2 * negative_bits_thd; in vepu510_h265_set_rc_regs()
1364 reg_rc->rc_dthd_0_8[1] = negative_bits_thd; in vepu510_h265_set_rc_regs()
1365 reg_rc->rc_dthd_0_8[2] = positive_bits_thd; in vepu510_h265_set_rc_regs()
1366 reg_rc->rc_dthd_0_8[3] = 2 * positive_bits_thd; in vepu510_h265_set_rc_regs()
1367 reg_rc->rc_dthd_0_8[4] = 0x7FFFFFFF; in vepu510_h265_set_rc_regs()
1368 reg_rc->rc_dthd_0_8[5] = 0x7FFFFFFF; in vepu510_h265_set_rc_regs()
1369 reg_rc->rc_dthd_0_8[6] = 0x7FFFFFFF; in vepu510_h265_set_rc_regs()
1370 reg_rc->rc_dthd_0_8[7] = 0x7FFFFFFF; in vepu510_h265_set_rc_regs()
1371 reg_rc->rc_dthd_0_8[8] = 0x7FFFFFFF; in vepu510_h265_set_rc_regs()
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H A Dhal_h265e_vepu580.c1895 hevc_vepu580_rc_klut *reg_rc = &regs->reg_rc_klut; in vepu580_h265_set_rc_regs() local
1934 reg_rc->rc_dthd_0_8[0] = 2 * negative_bits_thd; in vepu580_h265_set_rc_regs()
1935 reg_rc->rc_dthd_0_8[1] = negative_bits_thd; in vepu580_h265_set_rc_regs()
1936 reg_rc->rc_dthd_0_8[2] = positive_bits_thd; in vepu580_h265_set_rc_regs()
1937 reg_rc->rc_dthd_0_8[3] = 2 * positive_bits_thd; in vepu580_h265_set_rc_regs()
1938 reg_rc->rc_dthd_0_8[4] = 0x7FFFFFFF; in vepu580_h265_set_rc_regs()
1939 reg_rc->rc_dthd_0_8[5] = 0x7FFFFFFF; in vepu580_h265_set_rc_regs()
1940 reg_rc->rc_dthd_0_8[6] = 0x7FFFFFFF; in vepu580_h265_set_rc_regs()
1941 reg_rc->rc_dthd_0_8[7] = 0x7FFFFFFF; in vepu580_h265_set_rc_regs()
1942 reg_rc->rc_dthd_0_8[8] = 0x7FFFFFFF; in vepu580_h265_set_rc_regs()
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