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Searched refs:prep_cfg (Results 1 – 9 of 9) sorted by relevance

/rockchip-linux_mpp/mpp/hal/rkenc/h265e/
H A Dhal_h265e_vepu540c.c791 …MPP_RET vepu540c_h265_set_pp_regs(H265eV540cRegSet *regs, VepuFmtCfg *fmt, MppEncPrepCfg *prep_cfg) in vepu540c_h265_set_pp_regs() argument
803 reg_base->reg0198_src_fmt.out_fmt = (prep_cfg->format == MPP_FMT_YUV400) ? 0 : 1; in vepu540c_h265_set_pp_regs()
804 reg_base->reg0203_src_proc.src_mirr = prep_cfg->mirroring > 0; in vepu540c_h265_set_pp_regs()
805 reg_base->reg0203_src_proc.src_rot = prep_cfg->rotation; in vepu540c_h265_set_pp_regs()
807 if (prep_cfg->hor_stride) { in vepu540c_h265_set_pp_regs()
808 stridey = prep_cfg->hor_stride; in vepu540c_h265_set_pp_regs()
811 stridey = prep_cfg->width * 4; in vepu540c_h265_set_pp_regs()
813 stridey = prep_cfg->width * 3; in vepu540c_h265_set_pp_regs()
817 stridey = prep_cfg->width * 2; in vepu540c_h265_set_pp_regs()
825 … const VepuRgb2YuvCfg *cfg_coeffs = cfg_coeffs = get_rgb2yuv_cfg(prep_cfg->range, prep_cfg->color); in vepu540c_h265_set_pp_regs()
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H A Dhal_h265e_vepu510.c1405 …c MPP_RET vepu510_h265_set_pp_regs(H265eV510RegSet *regs, VepuFmtCfg *fmt, MppEncPrepCfg *prep_cfg) in vepu510_h265_set_pp_regs() argument
1417 …reg_frm->common.src_fmt.out_fmt = ((prep_cfg->format & MPP_FRAME_FMT_MASK) == MPP_FMT_YUV400) ? 0 … in vepu510_h265_set_pp_regs()
1419 reg_frm->common.src_proc.src_mirr = prep_cfg->mirroring > 0; in vepu510_h265_set_pp_regs()
1420 reg_frm->common.src_proc.src_rot = prep_cfg->rotation; in vepu510_h265_set_pp_regs()
1423 if (prep_cfg->hor_stride) { in vepu510_h265_set_pp_regs()
1424 if (MPP_FRAME_FMT_IS_TILE(prep_cfg->format)) { in vepu510_h265_set_pp_regs()
1427 switch (prep_cfg->format & MPP_FRAME_FMT_MASK) { in vepu510_h265_set_pp_regs()
1429 stridey = prep_cfg->hor_stride * 4; in vepu510_h265_set_pp_regs()
1433 stridey = prep_cfg->hor_stride * 4 * 3 / 2; in vepu510_h265_set_pp_regs()
1437 stridey = prep_cfg->hor_stride * 4 * 2; in vepu510_h265_set_pp_regs()
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H A Dhal_h265e_vepu541.c1067 MppEncPrepCfg *prep_cfg = &ctx->cfg->prep; in vepu541_h265_set_pp_regs() local
1068 MppFrameFormat prep_fmt = prep_cfg->format; in vepu541_h265_set_pp_regs()
1075 regs->src_proc.src_mirr = prep_cfg->mirroring > 0; in vepu541_h265_set_pp_regs()
1076 regs->src_proc.src_rot = prep_cfg->rotation; in vepu541_h265_set_pp_regs()
1084 stridey = MPP_ALIGN(prep_cfg->hor_stride, 16); in vepu541_h265_set_pp_regs()
1085 } else if (prep_cfg->hor_stride) { in vepu541_h265_set_pp_regs()
1086 stridey = prep_cfg->hor_stride; in vepu541_h265_set_pp_regs()
1089 stridey = prep_cfg->width * 4; in vepu541_h265_set_pp_regs()
1091 stridey = prep_cfg->width * 3; in vepu541_h265_set_pp_regs()
1095 stridey = prep_cfg->width * 2; in vepu541_h265_set_pp_regs()
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H A Dhal_h265e_vepu580.c1981 MppEncPrepCfg *prep_cfg, HalEncTask *task) in vepu580_h265_set_pp_regs() argument
1992 reg_base->reg0198_src_fmt.out_fmt = (prep_cfg->format == MPP_FMT_YUV400) ? 0 : 1; in vepu580_h265_set_pp_regs()
1993 reg_base->reg0203_src_proc.src_mirr = prep_cfg->mirroring > 0; in vepu580_h265_set_pp_regs()
1994 reg_base->reg0203_src_proc.src_rot = prep_cfg->rotation; in vepu580_h265_set_pp_regs()
1996 if (MPP_FRAME_FMT_IS_YUV(prep_cfg->format)) in vepu580_h265_set_pp_regs()
1999 reg_base->reg0198_src_fmt.src_range = (prep_cfg->range == MPP_FRAME_RANGE_JPEG) ? 1 : 0; in vepu580_h265_set_pp_regs()
2001 if (MPP_FRAME_FMT_IS_FBC(prep_cfg->format)) { in vepu580_h265_set_pp_regs()
2004 stridey = MPP_ALIGN(prep_cfg->width, 16); in vepu580_h265_set_pp_regs()
2005 } else if (prep_cfg->hor_stride) { in vepu580_h265_set_pp_regs()
2006 stridey = prep_cfg->hor_stride; in vepu580_h265_set_pp_regs()
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H A Dhal_h265e_vepu511.c1147 MppEncPrepCfg *prep_cfg, HalEncTask *task) in vepu511_h265_set_pp_regs() argument
1159 reg_frm->common.src_fmt.out_fmt = (prep_cfg->format == MPP_FMT_YUV400) ? 0 : 1; in vepu511_h265_set_pp_regs()
1161 reg_frm->common.src_proc.src_mirr = prep_cfg->mirroring > 0; in vepu511_h265_set_pp_regs()
1162 reg_frm->common.src_proc.src_rot = prep_cfg->rotation; in vepu511_h265_set_pp_regs()
1164 if (MPP_FRAME_FMT_IS_FBC(prep_cfg->format)) { in vepu511_h265_set_pp_regs()
1169 stridey = MPP_ALIGN(prep_cfg->hor_stride, 64) >> 2; in vepu511_h265_set_pp_regs()
1170 } else if (prep_cfg->hor_stride) in vepu511_h265_set_pp_regs()
1171 stridey = prep_cfg->hor_stride; in vepu511_h265_set_pp_regs()
1174 stridey = prep_cfg->width * 4; in vepu511_h265_set_pp_regs()
1176 stridey = prep_cfg->width * 3; in vepu511_h265_set_pp_regs()
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/rockchip-linux_mpp/mpp/codec/enc/h265/
H A Dh265e_slice.c214 MppEncPrepCfg *prep_cfg = &cfg->prep; in h265e_slice_init() local
260 slice->m_saoEnabledFlagChroma = (prep_cfg->format == MPP_FMT_YUV400) ? 0 : in h265e_slice_init()
/rockchip-linux_mpp/test/
H A Dmpi_rc2_test.c68 MppEncPrepCfg prep_cfg; member
H A Dmpi_enc_mt_test.c51 MppEncPrepCfg prep_cfg; member
H A Dmpi_enc_test.c82 MppEncPrepCfg prep_cfg; member