| /rk3399_rockchip-uboot/drivers/net/phy/ |
| H A D | natsemi.c | 22 phy_write(phydev, MDIO_DEVAD_NONE, MII_BMCR, BMCR_RESET); in dp83630_config()
58 phy_write(phydev, MDIO_DEVAD_NONE, MII_BMCR, BMCR_RESET); in dp838xx_config()
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| H A D | realtek.c | 66 phy_write(phydev, MDIO_DEVAD_NONE, MII_BMCR, BMCR_RESET); in rtl8211x_config()
96 phy_write(phydev, MDIO_DEVAD_NONE, MII_BMCR, BMCR_RESET); in rtl8211f_config()
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| H A D | et1011c.c | 37 phy_write(phydev, MDIO_DEVAD_NONE, MII_BMCR, ctl | BMCR_RESET); in et1011c_config()
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| H A D | marvell.c | 111 phy_write(phydev, MDIO_DEVAD_NONE, MII_BMCR, BMCR_RESET); in m88e1011s_config()
119 phy_write(phydev, MDIO_DEVAD_NONE, MII_BMCR, BMCR_RESET); in m88e1011s_config()
487 reg |= BMCR_RESET; in m88e1145_config()
588 reg |= BMCR_RESET; in m88e1680_config()
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| H A D | mscc.c | 254 phy_write(phydev, MDIO_DEVAD_NONE, MII_BMCR, (reg_val | BMCR_RESET)); in mscc_phy_soft_reset()
258 while ((reg_val & BMCR_RESET) && (timeout > 0)) { in mscc_phy_soft_reset()
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| H A D | phy.c | 796 if (phy_write(phydev, devad, MII_BMCR, BMCR_RESET) < 0) { in phy_reset()
810 while ((reg & BMCR_RESET) && timeout--) { in phy_reset()
820 if (reg & BMCR_RESET) { in phy_reset()
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| H A D | broadcom.c | 139 reg |= BMCR_RESET; in bcm5482_config()
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| /rk3399_rockchip-uboot/board/egnite/ethernut5/ |
| H A D | ethernut5.c | 175 miiphy_write(devname, 0, MII_BMCR, BMCR_RESET); in board_eth_init()
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| /rk3399_rockchip-uboot/drivers/qe/ |
| H A D | uec_phy.c | 264 ctrl |= BMCR_RESET; in genmii_setup_forced()
335 uec_phy_write(mii_info, MII_BMCR, BMCR_RESET); in marvell_config_aneg()
512 uec_phy_write(mii_info, MII_BMCR, BMCR_RESET); in uec_marvell_init()
585 BMCR_RESET); in dm9161_init()
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| /rk3399_rockchip-uboot/include/linux/ |
| H A D | mii.h | 48 #define BMCR_RESET 0x8000 /* Reset to default state */ macro
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| H A D | mdio.h | 75 #define MDIO_CTRL1_RESET BMCR_RESET
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| /rk3399_rockchip-uboot/drivers/net/ |
| H A D | ax88180.c | 116 ax88180_mdio_write (dev, MII_BMCR, (BMCR_RESET | BMCR_ANENABLE)); in ax88180_phy_reset()
119 while (ax88180_mdio_read (dev, MII_BMCR) & BMCR_RESET) { in ax88180_phy_reset()
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| H A D | smc911x.c | 88 smc911x_eth_phy_write(dev, 1, MII_BMCR, BMCR_RESET); in smc911x_phy_configure()
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| H A D | ag7xxx.c | 721 BMCR_ANENABLE | BMCR_RESET); in ag933x_phy_setup_reset_set()
734 } while (ret & BMCR_RESET); in ag933x_phy_setup_reset_fin()
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| H A D | fec_mxc.c | 211 fec_mdio_write(eth, fec->phy_id, MII_BMCR, BMCR_RESET); in miiphy_restart_aneg()
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| /rk3399_rockchip-uboot/common/ |
| H A D | miiphyutil.c | 359 if (miiphy_write(devname, addr, MII_BMCR, reg | BMCR_RESET) != 0) { in miiphy_reset()
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| /rk3399_rockchip-uboot/drivers/usb/eth/ |
| H A D | asix.c | 406 asix_mdio_write(dev, dev->phy_id, MII_BMCR, BMCR_RESET); in asix_basic_reset()
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| H A D | smsc95xx.c | 349 smsc95xx_mdio_write(udev, dev->phy_id, MII_BMCR, BMCR_RESET); in smsc95xx_phy_initialize()
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