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Searched refs:TSN0 (Results 1 – 5 of 5) sorted by relevance

/rk3399_ARM-atf/plat/intel/soc/stratix10/include/
H A Ds10_system_manager.h171 #define TSN0 0x00010001 macro
/rk3399_ARM-atf/plat/intel/soc/agilex/include/
H A Dagilex_system_manager.h172 #define TSN0 0x00010001 macro
/rk3399_ARM-atf/plat/intel/soc/n5x/include/
H A Dn5x_system_manager.h172 #define TSN0 0x00010001 macro
/rk3399_ARM-atf/plat/intel/soc/agilex5/include/
H A Dagilex5_system_manager.h181 #define TSN0 0x00010001 macro
/rk3399_ARM-atf/plat/intel/soc/common/drivers/ccu/
H A Dncore_ccu.c638 mmio_write_32(SOCFPGA_SYSMGR(IO_TBU_STREAM_ID_AX_REG_2_TSN0), TSN0); in setup_smmu_stream_id()