| #
57c20e24 |
| 24-Oct-2024 |
Mark Dykes <mark.dykes@arm.com> |
Merge "fix(intel): correct macro naming" into integration
|
| #
815245e4 |
| 07-Oct-2024 |
Sieu Mun Tang <sieu.mun.tang@intel.com> |
fix(intel): correct macro naming
Correct macro naming to meet define macro standard.
Change-Id: Id0a091d67ef879a0f4c048bd9c2169c603ff4ce9
Signed-off-by: Sieu Mun Tang <sieu.mun.tang@intel.com>
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| #
55512649 |
| 27-Dec-2023 |
Sandrine Bailleux (on vacation) <sandrine.bailleux@arm.com> |
Merge changes I548e3034,I65c7fd1b,I1cdacc0f,If9ac35af into integration
* changes:
feat(intel): support QSPI ECC Linux for Agilex
feat(intel): support QSPI ECC Linux for N5X
feat(intel): suppor
Merge changes I548e3034,I65c7fd1b,I1cdacc0f,If9ac35af into integration
* changes:
feat(intel): support QSPI ECC Linux for Agilex
feat(intel): support QSPI ECC Linux for N5X
feat(intel): support QSPI ECC Linux for Stratix10
feat(intel): add in QSPI ECC for Linux
show more ...
|
| #
d6ae69c8 |
| 21-Dec-2023 |
Sieu Mun Tang <sieu.mun.tang@intel.com> |
feat(intel): support QSPI ECC Linux for Agilex
Add QSPI ECC new opcodes for Linux to access to SDM register
Change-Id: I548e30340320ae2c2c9d60d20b218ee844516d64
Signed-off-by: Jit Loon Lim <jit.loo
feat(intel): support QSPI ECC Linux for Agilex
Add QSPI ECC new opcodes for Linux to access to SDM register
Change-Id: I548e30340320ae2c2c9d60d20b218ee844516d64
Signed-off-by: Jit Loon Lim <jit.loon.lim@intel.com>
Signed-off-by: Sieu Mun Tang <sieu.mun.tang@intel.com>
show more ...
|
| #
816c27fb |
| 23-May-2023 |
Sandrine Bailleux <sandrine.bailleux@arm.com> |
Merge changes I38545567,I2f52d3ea into integration
* changes:
feat(intel): restructure sys mgr for S10/N5X
feat(intel): restructure sys mgr for Agilex
|
| #
6197dc98 |
| 17-May-2023 |
Jit Loon Lim <jit.loon.lim@intel.com> |
feat(intel): restructure sys mgr for Agilex
This patch is to restructure system manager. Move platform dependent
MACROs to individual platform system manager. Common system manager will
remain for t
feat(intel): restructure sys mgr for Agilex
This patch is to restructure system manager. Move platform dependent
MACROs to individual platform system manager. Common system manager will
remain for those common declaration only.
Signed-off-by: Jit Loon Lim <jit.loon.lim@intel.com>
Change-Id: I2f52d3eaf47716f7dfc636bbf1a23d68a04f39cb
show more ...
|
| #
3dcb94dd |
| 21-Oct-2019 |
Hadi Asyrafi <muhammad.hadi.asyrafi.abdul.halim@intel.com> |
intel: Enable bridge access in Intel platform
Add bridge enablement features for each platform.
The bridge access will be enabled automatically for FPGA 1st
configuration only.
Signed-off-by: Hadi
intel: Enable bridge access in Intel platform
Add bridge enablement features for each platform.
The bridge access will be enabled automatically for FPGA 1st
configuration only.
Signed-off-by: Hadi Asyrafi <muhammad.hadi.asyrafi.abdul.halim@intel.com>
Change-Id: I264757b257a209e1c3c4206660f21c5d67af0d2f
show more ...
|
| #
222519a0 |
| 21-Oct-2019 |
Hadi Asyrafi <muhammad.hadi.asyrafi.abdul.halim@intel.com> |
intel: Modify non secure access function
Combine both peripheral and bridge non-secure access code
into a single callable function
Signed-off-by: Hadi Asyrafi <muhammad.hadi.asyrafi.abdul.halim@int
intel: Modify non secure access function
Combine both peripheral and bridge non-secure access code
into a single callable function
Signed-off-by: Hadi Asyrafi <muhammad.hadi.asyrafi.abdul.halim@intel.com>
Change-Id: I38d335ed8d1e9f55d337b63cca121a473897ef70
show more ...
|
| #
1ab2dc1a |
| 09-Jan-2020 |
Manish Pandey <manish.pandey2@arm.com> |
Merge "Remove redundant declarations." into integration
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| #
7a05f06a |
| 02-Jan-2020 |
Madhukar Pappireddy <madhukar.pappireddy@arm.com> |
Remove redundant declarations.
In further patches, we wish to enable -wredundant-decls check as
part of warning flags by default.
Change-Id: I43410d6dbf40361a503c16d94ccf0f4cf29615b7
Signed-off-by:
Remove redundant declarations.
In further patches, we wish to enable -wredundant-decls check as
part of warning flags by default.
Change-Id: I43410d6dbf40361a503c16d94ccf0f4cf29615b7
Signed-off-by: Madhukar Pappireddy <madhukar.pappireddy@arm.com>
show more ...
|
| #
2102198c |
| 14-Aug-2019 |
Paul Beesley <paul.beesley@arm.com> |
Merge "intel: agilex: Fix reliance on hard coded clock information" into integration
|
| #
4e865bd2 |
| 14-Aug-2019 |
Hadi Asyrafi <muhammad.hadi.asyrafi.abdul.halim@intel.com> |
intel: agilex: Fix reliance on hard coded clock information
Extract clock information for UART, MMC & Watchdog from the clock manager
Signed-off-by: Hadi Asyrafi <muhammad.hadi.asyrafi.abdul.halim@
intel: agilex: Fix reliance on hard coded clock information
Extract clock information for UART, MMC & Watchdog from the clock manager
Signed-off-by: Hadi Asyrafi <muhammad.hadi.asyrafi.abdul.halim@intel.com>
Change-Id: I42d3d4ceeaf45788d457472f6ddcd3fe099f0133
show more ...
|
| #
b514ee86 |
| 19-Jul-2019 |
Soby Mathew <soby.mathew@arm.com> |
Merge "intel: Adds support for Agilex platform" into integration
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| #
2f11d548 |
| 27-Jun-2019 |
Hadi Asyrafi <muhammad.hadi.asyrafi.abdul.halim@intel.com> |
intel: Adds support for Agilex platform
Signed-off-by: Hadi Asyrafi <muhammad.hadi.asyrafi.abdul.halim@intel.com>
Change-Id: Ib2ad2068abdf0b204c5cb021ea919581adaca4ef
|