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Searched refs:SPM_IRQ_MASK (Results 1 – 16 of 16) sorted by relevance

/rk3399_ARM-atf/plat/mediatek/mt8183/drivers/spm/
H A Dspm.c243 isr = mmio_read_32(SPM_IRQ_MASK) & SPM_TWAM_IRQ_MASK_LSB; in spm_set_wakeup_event()
244 mmio_write_32(SPM_IRQ_MASK, isr | ISRM_RET_IRQ_AUX); in spm_set_wakeup_event()
304 mmio_setbits_32(SPM_IRQ_MASK, ISRM_ALL_EXC_TWAM); in spm_clean_after_wakeup()
H A Dspm.h58 #define SPM_IRQ_MASK (SPM_BASE + 0x0B4) macro
/rk3399_ARM-atf/plat/mediatek/drivers/spm/mt8189/
H A Dmt_spm_internal.c609 isr = mmio_read_32(SPM_IRQ_MASK); in __spm_set_wakeup_event()
610 mmio_write_32(SPM_IRQ_MASK, isr | ISRM_RET_IRQ_AUX); in __spm_set_wakeup_event()
755 mmio_write_32(SPM_IRQ_MASK, in __spm_clean_after_wakeup()
756 mmio_read_32(SPM_IRQ_MASK) | ISRM_ALL_EXC_TWAM); in __spm_clean_after_wakeup()
H A Dmt_spm.c72 mmio_setbits_32(SPM_IRQ_MASK, ISRM_ALL_EXC_TWAM); in spm_irq0_handler()
H A Dmt_spm_reg.h46 #define SPM_IRQ_MASK (SPM_BASE + 0x0B4) macro
/rk3399_ARM-atf/plat/mediatek/drivers/spm/mt8188/
H A Dmt_spm_internal.c291 mmio_setbits_32(SPM_IRQ_MASK, ISRM_RET_IRQ_AUX); in __spm_set_wakeup_event()
407 mmio_setbits_32(SPM_IRQ_MASK, ISRM_ALL_EXC_TWAM); in __spm_clean_after_wakeup()
/rk3399_ARM-atf/plat/mediatek/mt8195/drivers/spm/
H A Dmt_spm_internal.c348 mmio_setbits_32(SPM_IRQ_MASK, ISRM_RET_IRQ_AUX); in __spm_set_wakeup_event()
476 mmio_setbits_32(SPM_IRQ_MASK, ISRM_ALL_EXC_TWAM); in __spm_clean_after_wakeup()
H A Dmt_spm_reg.h51 #define SPM_IRQ_MASK (SPM_BASE + 0x078) macro
/rk3399_ARM-atf/plat/mediatek/mt8192/drivers/spm/
H A Dmt_spm_internal.c386 mmio_setbits_32(SPM_IRQ_MASK, ISRM_RET_IRQ_AUX); in __spm_set_wakeup_event()
514 mmio_setbits_32(SPM_IRQ_MASK, ISRM_ALL_EXC_TWAM); in __spm_clean_after_wakeup()
H A Dmt_spm_reg.h52 #define SPM_IRQ_MASK (SPM_BASE + 0x0B4) macro
/rk3399_ARM-atf/plat/mediatek/mt8186/drivers/spm/
H A Dmt_spm_internal.c417 mmio_setbits_32(SPM_IRQ_MASK, ISRM_RET_IRQ_AUX); in __spm_set_wakeup_event()
548 mmio_setbits_32(SPM_IRQ_MASK, ISRM_ALL_EXC_TWAM); in __spm_clean_after_wakeup()
H A Dmt_spm_reg.h44 #define SPM_IRQ_MASK (SPM_BASE + 0x0B4) macro
/rk3399_ARM-atf/plat/mediatek/drivers/spm/mt8196/
H A Dmt_spm.c73 mmio_setbits_32(SPM_IRQ_MASK, ISRM_ALL_EXC_TWAM); in spm_irq0_handler()
H A Dmt_spm_internal.c642 mmio_setbits_32(SPM_IRQ_MASK, ISRM_RET_IRQ_AUX); in __spm_set_wakeup_event()
761 mmio_setbits_32(SPM_IRQ_MASK, ISRM_ALL_EXC_TWAM); in __spm_clean_after_wakeup()
H A Dmt_spm_reg.h40 #define SPM_IRQ_MASK (SPM_BASE + 0x00B4) macro
/rk3399_ARM-atf/plat/mediatek/mt8188/include/
H A Dspm_reg.h41 #define SPM_IRQ_MASK (SPM_BASE + 0x078) macro