Home
last modified time | relevance | path

Searched refs:RC_M00_SRCLKEN_CFG (Results 1 – 6 of 6) sorted by relevance

/rk3399_ARM-atf/plat/mediatek/mt8195/drivers/spm/
H A Dmt_spm_internal.c518 mmio_clrsetbits_32(RC_M00_SRCLKEN_CFG, in __spm_xo_soc_bblpm()
523 mmio_clrsetbits_32(RC_M00_SRCLKEN_CFG, in __spm_xo_soc_bblpm()
H A Dmt_spm_reg.h309 #define RC_M00_SRCLKEN_CFG (SPM_BASE + 0x520) macro
/rk3399_ARM-atf/plat/mediatek/mt8192/drivers/spm/
H A Dmt_spm_internal.c556 mmio_clrsetbits_32(RC_M00_SRCLKEN_CFG, in __spm_xo_soc_bblpm()
561 mmio_clrsetbits_32(RC_M00_SRCLKEN_CFG, in __spm_xo_soc_bblpm()
H A Dmt_spm_reg.h297 #define RC_M00_SRCLKEN_CFG (SPM_BASE + 0x520) macro
/rk3399_ARM-atf/plat/mediatek/mt8186/drivers/spm/
H A Dmt_spm_internal.c591 mmio_clrsetbits_32(RC_M00_SRCLKEN_CFG, in __spm_xo_soc_bblpm()
596 mmio_clrsetbits_32(RC_M00_SRCLKEN_CFG, in __spm_xo_soc_bblpm()
H A Dmt_spm_reg.h276 #define RC_M00_SRCLKEN_CFG (SPM_BASE + 0x520) macro