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Searched refs:MC_RGM_BASE_ADDR (Results 1 – 4 of 4) sorted by relevance

/rk3399_ARM-atf/drivers/nxp/clk/s32cc/
H A Dmc_rgm.c98 prst = mmio_read_32(MC_RGM_PRST(MC_RGM_BASE_ADDR, 0U)); in mc_rgm_ddr_reset()
103 mc_rgm_release_periph(MC_RGM_BASE_ADDR, 0, 3); in mc_rgm_ddr_reset()
105 err = mmio_read_32_poll_timeout(MC_RGM_PSTAT(MC_RGM_BASE_ADDR, 0U), pstat, in mc_rgm_ddr_reset()
H A Ds32cc_early_clks.c234 err = mc_rgm_ddr_reset(MC_RGM_BASE_ADDR, S32CC_DDR_RESET_TIMEOUT_US); in plat_deassert_ddr_reset()
H A Ds32cc_clk_drv.c68 .mc_rgm = MC_RGM_BASE_ADDR, in get_drv()
/rk3399_ARM-atf/drivers/nxp/clk/s32cc/include/
H A Ds32cc-clk-regs.h19 #define MC_RGM_BASE_ADDR (0x40078000UL) macro