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Searched refs:ENABLE_STREAMID (Results 1 – 5 of 5) sorted by relevance

/rk3399_ARM-atf/plat/intel/soc/common/drivers/ccu/
H A Dncore_ccu.c642 mmio_write_32(SOCFPGA_SYSMGR(DMA_TBU_STREAM_CTRL_REG_0_DMA0), ENABLE_STREAMID); in setup_smmu_stream_id()
643 mmio_write_32(SOCFPGA_SYSMGR(DMA_TBU_STREAM_CTRL_REG_0_DMA1), ENABLE_STREAMID); in setup_smmu_stream_id()
644 mmio_write_32(SOCFPGA_SYSMGR(SDM_TBU_STREAM_CTRL_REG_1_SDM), ENABLE_STREAMID); in setup_smmu_stream_id()
645 mmio_write_32(SOCFPGA_SYSMGR(IO_TBU_STREAM_CTRL_REG_2_USB2), ENABLE_STREAMID); in setup_smmu_stream_id()
646 mmio_write_32(SOCFPGA_SYSMGR(IO_TBU_STREAM_CTRL_REG_2_USB3), ENABLE_STREAMID); in setup_smmu_stream_id()
647 mmio_write_32(SOCFPGA_SYSMGR(IO_TBU_STREAM_CTRL_REG_2_SDMMC), ENABLE_STREAMID); in setup_smmu_stream_id()
648 mmio_write_32(SOCFPGA_SYSMGR(IO_TBU_STREAM_CTRL_REG_2_NAND), ENABLE_STREAMID); in setup_smmu_stream_id()
649 mmio_write_32(SOCFPGA_SYSMGR(IO_TBU_STREAM_CTRL_REG_2_ETR), ENABLE_STREAMID); in setup_smmu_stream_id()
650 mmio_write_32(SOCFPGA_SYSMGR(TSN_TBU_STREAM_CTRL_REG_3_TSN0), ENABLE_STREAMID); in setup_smmu_stream_id()
651 mmio_write_32(SOCFPGA_SYSMGR(TSN_TBU_STREAM_CTRL_REG_3_TSN1), ENABLE_STREAMID); in setup_smmu_stream_id()
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/rk3399_ARM-atf/plat/intel/soc/stratix10/include/
H A Ds10_system_manager.h203 #define ENABLE_STREAMID WSTREAMIDEN_REG_CTRL | \ macro
/rk3399_ARM-atf/plat/intel/soc/agilex/include/
H A Dagilex_system_manager.h205 #define ENABLE_STREAMID WSTREAMIDEN_REG_CTRL | \ macro
/rk3399_ARM-atf/plat/intel/soc/n5x/include/
H A Dn5x_system_manager.h207 #define ENABLE_STREAMID WSTREAMIDEN_REG_CTRL | \ macro
/rk3399_ARM-atf/plat/intel/soc/agilex5/include/
H A Dagilex5_system_manager.h240 #define ENABLE_STREAMID WSTREAMIDEN_REG_CTRL \ macro