Searched refs:findiv (Results 1 – 2 of 2) sorted by relevance
1696 unsigned int *findiv) in flexclkgen_search_config() argument1704 assert(clk_src && prediv && findiv); in flexclkgen_search_config()1719 *findiv = (dt_cfg & FLEX_FDIV_MASK) >> FLEX_FDIV_SHIFT; in flexclkgen_search_config()1729 unsigned int prediv, unsigned int findiv) in flexclkgen_config_channel() argument1747 findiv); in flexclkgen_config_channel()2286 uint32_t findiv = 0; in clk_stm32_flexgen_get_rate() local2292 findiv = io_read32(rcc_base + RCC_FINDIV0CFGR + (0x4 * channel)) & in clk_stm32_flexgen_get_rate()2319 freq /= findiv + 1; in clk_stm32_flexgen_get_rate()2330 unsigned int *findiv) in clk_stm32_flexgen_get_round_rate() argument2338 *findiv = 0; in clk_stm32_flexgen_get_round_rate()[all …]
1700 unsigned int *findiv) in flexclkgen_search_config() argument1708 assert(clk_src && prediv && findiv); in flexclkgen_search_config()1723 *findiv = (dt_cfg & FLEX_FDIV_MASK) >> FLEX_FDIV_SHIFT; in flexclkgen_search_config()1733 unsigned int prediv, unsigned int findiv) in flexclkgen_config_channel() argument1751 findiv); in flexclkgen_config_channel()2316 uint32_t findiv = 0; in clk_stm32_flexgen_get_rate() local2322 findiv = io_read32(rcc_base + RCC_FINDIV0CFGR + (0x4 * channel)) & in clk_stm32_flexgen_get_rate()2350 freq /= findiv + 1; in clk_stm32_flexgen_get_rate()2358 unsigned int *findiv) in clk_stm32_flexgen_get_round_rate() argument2366 *findiv = 0; in clk_stm32_flexgen_get_round_rate()[all …]