Lines Matching refs:findiv
1700 unsigned int *findiv) in flexclkgen_search_config() argument
1708 assert(clk_src && prediv && findiv); in flexclkgen_search_config()
1723 *findiv = (dt_cfg & FLEX_FDIV_MASK) >> FLEX_FDIV_SHIFT; in flexclkgen_search_config()
1733 unsigned int prediv, unsigned int findiv) in flexclkgen_config_channel() argument
1751 findiv); in flexclkgen_config_channel()
2316 uint32_t findiv = 0; in clk_stm32_flexgen_get_rate() local
2322 findiv = io_read32(rcc_base + RCC_FINDIV0CFGR + (0x4 * channel)) & in clk_stm32_flexgen_get_rate()
2350 freq /= findiv + 1; in clk_stm32_flexgen_get_rate()
2358 unsigned int *findiv) in clk_stm32_flexgen_get_round_rate() argument
2366 *findiv = 0; in clk_stm32_flexgen_get_round_rate()
2390 *findiv = ratio - 1; in clk_stm32_flexgen_get_round_rate()
2397 return (prate / (*prediv + 1)) / (*findiv + 1); in clk_stm32_flexgen_get_round_rate()
2408 unsigned int findiv = 0; in clk_stm32_flexgen_set_rate() local
2410 clk_stm32_flexgen_get_round_rate(rate, parent_rate, &prediv, &findiv); in clk_stm32_flexgen_set_rate()
2427 findiv); in clk_stm32_flexgen_set_rate()