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Searched refs:csg (Results 1 – 3 of 3) sorted by relevance

/optee_os/core/drivers/clk/
H A Dclk-stm32mp21.c159 uint32_t csg[PLLCSG_NB]; member
1114 err = fdt_read_uint32_array(fdt, subnode_pll, "csg", pll->csg, in clk_stm32_parse_pll_fdt()
1477 uint32_t *csg) in clk_stm32_pll_config_csg() argument
1485 csg[DIVVAL] & RCC_PLLxCFGR5_DIVVAL_MASK); in clk_stm32_pll_config_csg()
1487 SHIFT_U32(csg[SPREAD], RCC_PLLxCFGR5_SPREAD_SHIFT) & in clk_stm32_pll_config_csg()
1490 if (csg[DOWNSPREAD]) in clk_stm32_pll_config_csg()
1588 clk_stm32_pll_config_csg(priv, pll, pll_conf->csg); in clk_stm32_pll_init()
H A Dclk-stm32mp13.c62 uint32_t csg[PLL_CSG_NB]; member
1220 mod_per = vco->csg[PLL_CSG_MOD_PER]; in clk_stm32_pll_config_csg()
1221 inc_step = vco->csg[PLL_CSG_INC_STEP]; in clk_stm32_pll_config_csg()
1222 sscg_mode = vco->csg[PLL_CSG_SSCG_MODE]; in clk_stm32_pll_config_csg()
1509 ret = fdt_read_uint32_array(fdt, subnode, "csg", vco->csg, in clk_stm32_load_vco_config_fdt()
H A Dclk-stm32mp25.c104 uint32_t csg[PLLCSG_NB]; member
1133 err = fdt_read_uint32_array(fdt, subnode_pll, "csg", pll->csg, in clk_stm32_parse_pll_fdt()
1495 uint32_t *csg) in clk_stm32_pll_config_csg() argument
1503 csg[DIVVAL] & RCC_PLLxCFGR5_DIVVAL_MASK); in clk_stm32_pll_config_csg()
1505 SHIFT_U32(csg[SPREAD], RCC_PLLxCFGR5_SPREAD_SHIFT) & in clk_stm32_pll_config_csg()
1508 if (csg[DOWNSPREAD]) in clk_stm32_pll_config_csg()
1592 clk_stm32_pll_config_csg(priv, pll, pll_conf->csg); in clk_stm32_pll_init()