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Searched refs:RCC_PLL2CFGR1 (Results 1 – 7 of 7) sorted by relevance

/optee_os/core/include/drivers/
H A Dstm32mp1_rcc.h33 #define RCC_PLL2CFGR1 0x98 macro
H A Dstm32mp21_rcc.h316 #define RCC_PLL2CFGR1 U(0x590) macro
H A Dstm32mp13_rcc.h44 #define RCC_PLL2CFGR1 U(0x4D4) macro
H A Dstm32mp25_rcc.h348 #define RCC_PLL2CFGR1 U(0x590) macro
/optee_os/core/drivers/clk/
H A Dclk-stm32mp21.c395 GATE_CFG(GATE_PLL1, RCC_PLL2CFGR1, 8, 0),
396 GATE_CFG(GATE_PLL1_RDY, RCC_PLL2CFGR1, 24, 0),
397 GATE_CFG(GATE_PLL2, RCC_PLL2CFGR1, 8, 0),
398 GATE_CFG(GATE_PLL2_RDY, RCC_PLL2CFGR1, 24, 0),
997 CLK_PLL_CFG(PLL2_ID, GATE_PLL2, MUX_MUXSEL6, RCC_PLL2CFGR1),
2659 static STM32_PLL2(ck_pll2, 0, RCC_PLL2CFGR1, GATE_PLL2, MUX_MUXSEL6);
H A Dclk-stm32mp25.c387 GATE_CFG(GATE_PLL1, RCC_PLL2CFGR1, 8, 0),
388 GATE_CFG(GATE_PLL1_RDY, RCC_PLL2CFGR1, 24, 0),
389 GATE_CFG(GATE_PLL2, RCC_PLL2CFGR1, 8, 0),
390 GATE_CFG(GATE_PLL2_RDY, RCC_PLL2CFGR1, 24, 0),
1015 CLK_PLL_CFG(PLL2_ID, GATE_PLL2, MUX_MUXSEL6, RCC_PLL2CFGR1),
2650 static STM32_PLL2(ck_pll2, 0, RCC_PLL2CFGR1, GATE_PLL2, MUX_MUXSEL6);
H A Dclk-stm32mp15.c501 RCC_RCK12SELR, RCC_PLL2CFGR1, RCC_PLL2CFGR2,