Searched refs:pllcr1 (Results 1 – 6 of 6) sorted by relevance
| /OK3568_Linux_fs/u-boot/board/freescale/b4860qds/ |
| H A D | b4860qds.c | 633 u32 fcap, dcbias, bcap, pllcr1, pllcr0; in check_pll_locks() local
658 clrbits_be32(&srds_regs->bank[pll_num].pllcr1, in check_pll_locks()
660 setbits_be32(&srds_regs->bank[pll_num].pllcr1, in check_pll_locks()
683 setbits_be32(&srds_regs->bank[pll_num].pllcr1, in check_pll_locks()
685 clrbits_be32(&srds_regs->bank[pll_num].pllcr1, in check_pll_locks()
687 setbits_be32(&srds_regs->bank[pll_num].pllcr1, in check_pll_locks()
691 clrbits_be32(&srds_regs->bank[pll_num].pllcr1, in check_pll_locks()
693 pllcr1 = (in_be32 in check_pll_locks()
694 (&srds_regs->bank[pll_num].pllcr1)| in check_pll_locks()
696 out_be32(&srds_regs->bank[pll_num].pllcr1, in check_pll_locks()
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| /OK3568_Linux_fs/u-boot/arch/powerpc/cpu/mpc85xx/ |
| H A D | fsl_corenet2_serdes.c | 267 pll_cr1 = in_be32(&srds_regs->bank[pll_num].pllcr1); in serdes_init()
270 out_be32(&srds_regs->bank[pll_num].pllcr1, in serdes_init()
284 pll_cr1 = in_be32(&srds_regs->bank[pll_num].pllcr1); in serdes_init()
286 out_be32(&srds_regs->bank[pll_num].pllcr1, in serdes_init()
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| H A D | fsl_corenet_serdes.c | 372 setbits_be32(®s->bank[FSL_SRDS_BANK_3].pllcr1, in p4080_erratum_serdes8()
430 clrbits_be32(®s->bank[FSL_SRDS_BANK_1].pllcr1, in p4080_erratum_serdes_a005()
438 clrbits_be32(®s->bank[FSL_SRDS_BANK_1].pllcr1, in p4080_erratum_serdes_a005()
440 setbits_be32(®s->bank[FSL_SRDS_BANK_3].pllcr1, in p4080_erratum_serdes_a005()
453 clrbits_be32(®s->bank[bank].pllcr1, in p4080_erratum_serdes_a005()
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| /OK3568_Linux_fs/u-boot/arch/arm/include/asm/arch-ls102xa/ |
| H A D | immap_ls102xa.h | 330 u32 pllcr1; /* PLL Control Register 1 */ member
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| /OK3568_Linux_fs/u-boot/arch/arm/include/asm/arch-fsl-layerscape/ |
| H A D | immap_lsch2.h | 472 u32 pllcr1; /* PLL Control Register 1 */ member
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| /OK3568_Linux_fs/u-boot/arch/powerpc/include/asm/ |
| H A D | immap_85xx.h | 2565 u32 pllcr1; /* PLL Control Register 1 */ member
2638 u32 pllcr1; /* PLL Control Register 1 */ member
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