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Searched refs:pic_height (Results 1 – 22 of 22) sorted by relevance

/OK3568_Linux_fs/kernel/drivers/gpu/drm/amd/display/dc/dcn20/
H A Ddcn20_dsc.c293 DC_LOG_DSC("\tpic_height %d", pps->pic_height); in dsc_log_pps()
343 ASSERT(dsc_cfg->pic_height); in dsc_prepare_config()
353 !dsc_cfg->pic_width || !dsc_cfg->pic_height || in dsc_prepare_config()
372 dsc_reg_vals->pps.pic_height = dsc_cfg->pic_height; in dsc_prepare_config()
382 dsc_reg_vals->pps.slice_height = dsc_cfg->pic_height / dsc_cfg->dc_dsc_cfg.num_slices_v; in dsc_prepare_config()
384 ASSERT(dsc_reg_vals->pps.slice_height * dsc_cfg->dc_dsc_cfg.num_slices_v == dsc_cfg->pic_height); in dsc_prepare_config()
385 if (!(dsc_reg_vals->pps.slice_height * dsc_cfg->dc_dsc_cfg.num_slices_v == dsc_cfg->pic_height)) { in dsc_prepare_config()
386 …ix height %d not divisible by num_slices_v %d\n\n", __func__, dsc_cfg->pic_height, dsc_cfg->dc_dsc… in dsc_prepare_config()
502 reg_vals->pps.pic_height = 0; in dsc_init_reg_values()
560 PIC_HEIGHT, reg_vals->pps.pic_height); in dsc_write_to_registers()
[all …]
H A Ddcn20_resource.c2498 dsc_cfg.pic_height = stream->timing.v_addressable + stream->timing.v_border_top
/OK3568_Linux_fs/kernel/drivers/gpu/drm/amd/display/dc/dsc/
H A Ddc_dsc.c560 int pic_height; in setup_dsc_config() local
568 pic_height = timing->v_addressable + timing->v_border_top + timing->v_border_bottom; in setup_dsc_config()
724 slice_height = min(policy.min_slice_height, pic_height); in setup_dsc_config()
726 slice_height = min(min_slice_height_override, pic_height); in setup_dsc_config()
728 while (slice_height < pic_height && (pic_height % slice_height != 0 || in setup_dsc_config()
738 dsc_cfg->num_slices_v = pic_height/slice_height; in setup_dsc_config()
H A Drc_calc_dpi.c41 to->pic_height = from->pic_height; in copy_pps_fields()
/OK3568_Linux_fs/u-boot/include/drm/
H A Ddrm_dsc.h115 u16 pic_height; member
342 __be16 pic_height; member
/OK3568_Linux_fs/kernel/include/drm/
H A Ddrm_dsc.h114 u16 pic_height; member
341 __be16 pic_height; member
/OK3568_Linux_fs/u-boot/drivers/video/drm/
H A Ddrm_dsc.c107 pps_payload->pic_height = cpu_to_be16(dsc_cfg->pic_height); in drm_dsc_pps_payload_pack()
H A Drockchip_dw_hdmi_qp.c93 u32 pic_height; member
700 u16 pic_width, u16 pic_height, in dw_hdmi_qp_set_link_cfg() argument
708 pic_height == pps_datas[i].pic_height && in dw_hdmi_qp_set_link_cfg()
/OK3568_Linux_fs/kernel/drivers/gpu/drm/
H A Ddrm_dsc.c113 pps_payload->pic_height = cpu_to_be16(dsc_cfg->pic_height); in drm_dsc_pps_payload_pack()
/OK3568_Linux_fs/kernel/drivers/gpu/drm/amd/display/dc/inc/hw/
H A Ddsc.h39 uint32_t pic_height; member
/OK3568_Linux_fs/external/mpp/mpp/hal/rkenc/h265e/
H A Dhal_h265e_vepu541.c762 RK_U32 ver_stride = syn->pp.ver_stride ? syn->pp.ver_stride : syn->pp.pic_height; in vepu541_h265_set_patch_info()
1020 mb_h64 = (syn->pp.pic_height + 63) / 64; in vepu541_h265_set_rc_regs()
1285 if (syn->pp.pic_height < merangy + 60 || syn->pp.pic_height <= 288) { in vepu541_h265_set_me_regs()
1286 if (merangy > syn->pp.pic_height) { in vepu541_h265_set_me_regs()
1287 merangy = syn->pp.pic_height; in vepu541_h265_set_me_regs()
1561 pic_height_align8 = (syn->pp.pic_height + 7) & (~7); in hal_h265e_v541_gen_regs()
1563 pic_h64 = (syn->pp.pic_height + 63) / 64; in hal_h265e_v541_gen_regs()
1590 regs->enc_rsl.pic_hfill = (syn->pp.pic_height & 0x7) in hal_h265e_v541_gen_regs()
1591 ? (8 - (syn->pp.pic_height & 0x7)) : 0; in hal_h265e_v541_gen_regs()
1700 RK_S32 mb_h = MPP_ALIGN(syn->pp.pic_height, 64) / 64; in hal_h265e_v540_set_uniform_tile()
H A Dhal_h265e_vepu540c.c629 RK_U32 ver_stride = syn->pp.ver_stride ? syn->pp.ver_stride : syn->pp.pic_height; in vepu540c_h265_set_patch_info()
737 RK_S32 mb_h32 = (syn->pp.pic_height + 31) / 32; in vepu540c_h265_set_rc_regs()
1160 pic_height_align8 = (syn->pp.pic_height + 7) & (~7); in hal_h265e_v540c_gen_regs()
1162 pic_h32 = (syn->pp.pic_height + 31) / 32; in hal_h265e_v540c_gen_regs()
1213 reg_base->reg0197_src_fill.pic_hfill = (syn->pp.pic_height & 0x7) in hal_h265e_v540c_gen_regs()
1214 ? (8 - (syn->pp.pic_height & 0x7)) : 0; in hal_h265e_v540c_gen_regs()
H A Dhal_h265e_vepu580.c1558 RK_U32 ver_stride = syn->pp.ver_stride ? syn->pp.ver_stride : syn->pp.pic_height; in vepu580_h265_set_patch_info()
1822 mb_h64 = (syn->pp.pic_height + 63) / 64; in vepu580_h265_set_rc_regs()
2220 if (syn->pp.pic_height < merangy + 60 || syn->pp.pic_height <= 288) { in vepu580_h265_set_me_regs()
2221 if (merangy > syn->pp.pic_height) { in vepu580_h265_set_me_regs()
2222 merangy = syn->pp.pic_height; in vepu580_h265_set_me_regs()
2532 pic_height_align8 = (syn->pp.pic_height + 7) & (~7); in hal_h265e_v580_gen_regs()
2534 pic_h64 = (syn->pp.pic_height + 63) / 64; in hal_h265e_v580_gen_regs()
2583 reg_base->reg0197_src_fill.pic_hfill = (syn->pp.pic_height & 0x7) in hal_h265e_v580_gen_regs()
2584 ? (8 - (syn->pp.pic_height & 0x7)) : 0; in hal_h265e_v580_gen_regs()
2664 RK_S32 mb_h = MPP_ALIGN(syn->pp.pic_height, 64) / 64; in hal_h265e_v580_set_uniform_tile()
/OK3568_Linux_fs/kernel/drivers/gpu/drm/i915/display/
H A Dintel_vdsc.c389 vdsc_cfg->pic_height = pipe_config->hw.adjusted_mode.crtc_vdisplay; in intel_dsc_compute_params()
566 pps_val |= DSC_PIC_HEIGHT(vdsc_cfg->pic_height) | in intel_dsc_pps_configure()
798 DSC_SLICE_ROW_PER_FRAME(vdsc_cfg->pic_height / in intel_dsc_pps_configure()
H A Dicl_dsi.c1508 vdsc_cfg->pic_height % vdsc_cfg->slice_height); in gen11_dsi_dsc_compute_config()
H A Dintel_dp.c2194 if (vdsc_cfg->pic_height % 8 == 0) in intel_dp_dsc_compute_params()
2196 else if (vdsc_cfg->pic_height % 4 == 0) in intel_dp_dsc_compute_params()
/OK3568_Linux_fs/external/mpp/mpp/common/
H A Dh265e_syntax_new.h29 RK_U16 pic_height; member
/OK3568_Linux_fs/kernel/drivers/gpu/drm/amd/display/dc/core/
H A Ddc_link_hwss.c449 …dsc_cfg.pic_height = stream->timing.v_addressable + stream->timing.v_border_top + stream->timing.v… in dp_set_dsc_on_stream()
555 …dsc_cfg.pic_height = stream->timing.v_addressable + stream->timing.v_border_top + stream->timing.v… in dp_set_dsc_pps_sdp()
/OK3568_Linux_fs/external/mpp/mpp/codec/enc/h265/
H A Dh265e_syntax.c34 pp->pic_height = h->cfg->prep.height; in fill_picture_parameters()
/OK3568_Linux_fs/external/mpp/mpp/hal/vpu/av1d/
H A Dhal_av1d_vdpu.c174 RK_U32 pic_height = MPP_ALIGN(dxva->height, 64); in vdpu_av1d_filtermem_alloc() local
175 RK_U32 height_in_sb = pic_height / 64; in vdpu_av1d_filtermem_alloc()
176 RK_U32 stripe_num = ((pic_height + 8) + 63) / 64; in vdpu_av1d_filtermem_alloc()
188 filt_info[DB_DATA_COL].size = MPP_ALIGN(pic_height * 12 * max_bit_depth / 8, 128); in vdpu_av1d_filtermem_alloc()
194 filt_info[DB_CTRL_COL].size = MPP_ALIGN(pic_height * 2 * 16 / 4, 128); in vdpu_av1d_filtermem_alloc()
/OK3568_Linux_fs/kernel/drivers/gpu/drm/rockchip/
H A Ddw_hdmi-rockchip.c486 u32 pic_height; member
1116 u16 pic_width, u16 pic_height, in dw_hdmi_qp_set_link_cfg() argument
1124 pic_height == pps_datas[i].pic_height && in dw_hdmi_qp_set_link_cfg()
/OK3568_Linux_fs/kernel/drivers/gpu/drm/i915/
H A Di915_reg.h12070 #define DSC_PIC_HEIGHT(pic_height) ((pic_height) << 0) argument