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Searched refs:phy_reg1_val (Results 1 – 4 of 4) sorted by relevance

/OK3568_Linux_fs/u-boot/drivers/ddr/marvell/a38x/
H A Dddr3_init.h220 extern u32 phy_reg1_val;
277 extern u32 phy_reg1_val;
H A Dddr3_debug.c933 *ptr = (u32 *)&phy_reg1_val; in ddr3_tip_access_atr()
H A Dddr3_training_leveling.c1217 phy_reg1_val) << 10); in ddr3_tip_dynamic_write_leveling()
H A Dddr3_training.c27 u32 phy_reg1_val = 8; variable