Searched refs:icr0 (Results 1 – 11 of 11) sorted by relevance
83 uint64_t icr0:1; member117 uint64_t icr0:1;131 uint64_t icr0:1; member165 uint64_t icr0:1;184 uint64_t icr0:1; member208 uint64_t icr0:1;
34 out_8(&intp->icr0[CONFIG_SYS_TMRINTR_NO], CONFIG_SYS_TMRINTR_PRI); in dtimer_intr_setup()
32 out_8(&intp->icr0[CONFIG_SYS_TMRINTR_NO], CONFIG_SYS_TMRINTR_PRI); in dtimer_intr_setup()
31 out_8(&intp->icr0[CONFIG_SYS_TMRINTR_NO], CONFIG_SYS_TMRINTR_PRI); in dtimer_intr_setup()
30 out_8(&intp->icr0[CONFIG_SYS_TMRINTR_NO], CONFIG_SYS_TMRINTR_PRI); in dtimer_intr_setup()
71 out_8(&intp->icr0[CONFIG_SYS_TMRINTR_NO], CONFIG_SYS_TMRINTR_PRI); in dtimer_intr_setup()
44 u8 icr0; member
119 out_8(&icr->icr0, 0x00); /* sw watchdog */ in cpu_init_f()
40 u8 icr0[64]; /* 0x40 - 0x7F Control registers */ member
4084 u32 icr0, icr0_remaining; in i40e_intr() local4087 icr0 = rd32(hw, I40E_PFINT_ICR0); in i40e_intr()4091 if ((icr0 & I40E_PFINT_ICR0_INTEVENT_MASK) == 0) in i40e_intr()4095 if (((icr0 & ~I40E_PFINT_ICR0_INTEVENT_MASK) == 0) || in i40e_intr()4096 (icr0 & I40E_PFINT_ICR0_SWINT_MASK)) in i40e_intr()4100 (icr0 & I40E_PFINT_ICR0_ENA_PE_CRITERR_MASK)) { in i40e_intr()4107 if (icr0 & I40E_PFINT_ICR0_QUEUE_0_MASK) { in i40e_intr()4121 if (icr0 & I40E_PFINT_ICR0_ADMINQ_MASK) { in i40e_intr()4127 if (icr0 & I40E_PFINT_ICR0_MAL_DETECT_MASK) { in i40e_intr()4132 if (icr0 & I40E_PFINT_ICR0_VFLR_MASK) { in i40e_intr()[all …]