xref: /OK3568_Linux_fs/u-boot/arch/m68k/cpu/mcf532x/interrupts.c (revision 4882a59341e53eb6f0b4789bf948001014eff981) 
1*4882a593Smuzhiyun /*
2*4882a593Smuzhiyun  *
3*4882a593Smuzhiyun  * Copyright (C) 2004-2007, 2012 Freescale Semiconductor, Inc.
4*4882a593Smuzhiyun  * TsiChung Liew (Tsi-Chung.Liew@freescale.com)
5*4882a593Smuzhiyun  *
6*4882a593Smuzhiyun  * SPDX-License-Identifier:	GPL-2.0+
7*4882a593Smuzhiyun  */
8*4882a593Smuzhiyun 
9*4882a593Smuzhiyun /* CPU specific interrupt routine */
10*4882a593Smuzhiyun #include <common.h>
11*4882a593Smuzhiyun #include <asm/immap.h>
12*4882a593Smuzhiyun #include <asm/io.h>
13*4882a593Smuzhiyun 
interrupt_init(void)14*4882a593Smuzhiyun int interrupt_init(void)
15*4882a593Smuzhiyun {
16*4882a593Smuzhiyun 	int0_t *intp = (int0_t *) (CONFIG_SYS_INTR_BASE);
17*4882a593Smuzhiyun 
18*4882a593Smuzhiyun 	/* Make sure all interrupts are disabled */
19*4882a593Smuzhiyun 	setbits_be32(&intp->imrh0, 0xffffffff);
20*4882a593Smuzhiyun 	setbits_be32(&intp->imrl0, 0xffffffff);
21*4882a593Smuzhiyun 
22*4882a593Smuzhiyun 	enable_interrupts();
23*4882a593Smuzhiyun 	return 0;
24*4882a593Smuzhiyun }
25*4882a593Smuzhiyun 
26*4882a593Smuzhiyun #if defined(CONFIG_MCFTMR)
dtimer_intr_setup(void)27*4882a593Smuzhiyun void dtimer_intr_setup(void)
28*4882a593Smuzhiyun {
29*4882a593Smuzhiyun 	int0_t *intp = (int0_t *) (CONFIG_SYS_INTR_BASE);
30*4882a593Smuzhiyun 
31*4882a593Smuzhiyun 	out_8(&intp->icr0[CONFIG_SYS_TMRINTR_NO], CONFIG_SYS_TMRINTR_PRI);
32*4882a593Smuzhiyun 	clrbits_be32(&intp->imrh0, CONFIG_SYS_TMRINTR_MASK);
33*4882a593Smuzhiyun }
34*4882a593Smuzhiyun #endif
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