Searched refs:SMMU_BASE (Results 1 – 4 of 4) sorted by relevance
90 #define SMMU_SCR0 (SMMU_BASE + 0x0)91 #define SMMU_SCR1 (SMMU_BASE + 0x4)92 #define SMMU_SCR2 (SMMU_BASE + 0x8)93 #define SMMU_SACR (SMMU_BASE + 0x10)94 #define SMMU_IDR0 (SMMU_BASE + 0x20)95 #define SMMU_IDR1 (SMMU_BASE + 0x24)97 #define SMMU_NSCR0 (SMMU_BASE + 0x400)98 #define SMMU_NSCR2 (SMMU_BASE + 0x408)99 #define SMMU_NSACR (SMMU_BASE + 0x410)
596 #define SMMU_SCR0 (SMMU_BASE + 0x0)597 #define SMMU_SCR1 (SMMU_BASE + 0x4)598 #define SMMU_SCR2 (SMMU_BASE + 0x8)599 #define SMMU_SACR (SMMU_BASE + 0x10)600 #define SMMU_IDR0 (SMMU_BASE + 0x20)601 #define SMMU_IDR1 (SMMU_BASE + 0x24)603 #define SMMU_NSCR0 (SMMU_BASE + 0x400)604 #define SMMU_NSCR2 (SMMU_BASE + 0x408)605 #define SMMU_NSACR (SMMU_BASE + 0x410)
53 #define SMMU_BASE 0x05000000 /* GR0 Base */ macro156 #define SMMU_BASE 0x09000000 macro214 #define SMMU_BASE 0x09000000 macro
175 #ifdef SMMU_BASE177 ldr x1, =SMMU_BASE