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Searched refs:ROCKCHIP_MMC_DELAYNUM_OFFSET (Results 1 – 14 of 14) sorted by relevance

/OK3568_Linux_fs/kernel/drivers/clk/rockchip/
H A Dclk-mmc-phase.c35 #define ROCKCHIP_MMC_DELAYNUM_OFFSET 2 macro
36 #define ROCKCHIP_MMC_DELAYNUM_MASK (0xff << ROCKCHIP_MMC_DELAYNUM_OFFSET)
68 delay_num >>= ROCKCHIP_MMC_DELAYNUM_OFFSET; in rockchip_mmc_get_phase()
136 raw_value |= delay_num << ROCKCHIP_MMC_DELAYNUM_OFFSET; in rockchip_mmc_set_phase()
/OK3568_Linux_fs/u-boot/drivers/clk/rockchip/
H A Dclk_rk3128.c665 #define ROCKCHIP_MMC_DELAYNUM_OFFSET 2 macro
666 #define ROCKCHIP_MMC_DELAYNUM_MASK (0xff << ROCKCHIP_MMC_DELAYNUM_OFFSET)
704 delay_num >>= ROCKCHIP_MMC_DELAYNUM_OFFSET; in rk3128_mmc_get_phase()
739 raw_value |= delay_num << ROCKCHIP_MMC_DELAYNUM_OFFSET; in rk3128_mmc_set_phase()
H A Dclk_rk322x.c808 #define ROCKCHIP_MMC_DELAYNUM_OFFSET 2 macro
809 #define ROCKCHIP_MMC_DELAYNUM_MASK (0xff << ROCKCHIP_MMC_DELAYNUM_OFFSET)
847 delay_num >>= ROCKCHIP_MMC_DELAYNUM_OFFSET; in rk322x_mmc_get_phase()
882 raw_value |= delay_num << ROCKCHIP_MMC_DELAYNUM_OFFSET; in rk322x_mmc_set_phase()
H A Dclk_rk3308.c1102 #define ROCKCHIP_MMC_DELAYNUM_OFFSET 3 macro
1103 #define ROCKCHIP_MMC_DELAYNUM_MASK (0xff << ROCKCHIP_MMC_DELAYNUM_OFFSET)
1139 delay_num >>= ROCKCHIP_MMC_DELAYNUM_OFFSET; in rockchip_mmc_get_phase()
1175 raw_value |= delay_num << ROCKCHIP_MMC_DELAYNUM_OFFSET; in rockchip_mmc_set_phase()
H A Dclk_rk3328.c1145 #define ROCKCHIP_MMC_DELAYNUM_OFFSET 2 macro
1146 #define ROCKCHIP_MMC_DELAYNUM_MASK (0xff << ROCKCHIP_MMC_DELAYNUM_OFFSET)
1184 delay_num >>= ROCKCHIP_MMC_DELAYNUM_OFFSET; in rk3328_mmc_get_phase()
1219 raw_value |= delay_num << ROCKCHIP_MMC_DELAYNUM_OFFSET; in rk3328_mmc_set_phase()
H A Dclk_rk3288.c1246 #define ROCKCHIP_MMC_DELAYNUM_OFFSET 2 macro
1247 #define ROCKCHIP_MMC_DELAYNUM_MASK (0xff << ROCKCHIP_MMC_DELAYNUM_OFFSET)
1282 delay_num >>= ROCKCHIP_MMC_DELAYNUM_OFFSET; in rockchip_mmc_get_phase()
1317 raw_value |= delay_num << ROCKCHIP_MMC_DELAYNUM_OFFSET; in rockchip_mmc_set_phase()
H A Dclk_rk1808.c1106 #define ROCKCHIP_MMC_DELAYNUM_OFFSET 2 macro
1107 #define ROCKCHIP_MMC_DELAYNUM_MASK (0xff << ROCKCHIP_MMC_DELAYNUM_OFFSET)
1145 delay_num >>= ROCKCHIP_MMC_DELAYNUM_OFFSET; in rk1808_mmc_get_phase()
1180 raw_value |= delay_num << ROCKCHIP_MMC_DELAYNUM_OFFSET; in rk1808_mmc_set_phase()
H A Dclk_rv1106.c1418 #define ROCKCHIP_MMC_DELAYNUM_OFFSET 2 macro
1419 #define ROCKCHIP_MMC_DELAYNUM_MASK (0xff << ROCKCHIP_MMC_DELAYNUM_OFFSET)
1455 delay_num >>= ROCKCHIP_MMC_DELAYNUM_OFFSET; in rv1106_mmc_get_phase()
1488 raw_value |= delay_num << ROCKCHIP_MMC_DELAYNUM_OFFSET; in rv1106_mmc_set_phase()
H A Dclk_rk3368.c1128 #define ROCKCHIP_MMC_DELAYNUM_OFFSET 2 macro
1129 #define ROCKCHIP_MMC_DELAYNUM_MASK (0xff << ROCKCHIP_MMC_DELAYNUM_OFFSET)
1167 delay_num >>= ROCKCHIP_MMC_DELAYNUM_OFFSET; in rk3368_mmc_get_phase()
1202 raw_value |= delay_num << ROCKCHIP_MMC_DELAYNUM_OFFSET; in rk3368_mmc_set_phase()
H A Dclk_rk3528.c1626 #define ROCKCHIP_MMC_DELAYNUM_OFFSET 3 macro
1627 #define ROCKCHIP_MMC_DELAYNUM_MASK (0xff << ROCKCHIP_MMC_DELAYNUM_OFFSET)
1660 delay_num >>= ROCKCHIP_MMC_DELAYNUM_OFFSET; in rk3528_mmc_get_phase()
1693 raw_value |= delay_num << ROCKCHIP_MMC_DELAYNUM_OFFSET; in rk3528_mmc_set_phase()
H A Dclk_px30.c1480 #define ROCKCHIP_MMC_DELAYNUM_OFFSET 2 macro
1481 #define ROCKCHIP_MMC_DELAYNUM_MASK (0xff << ROCKCHIP_MMC_DELAYNUM_OFFSET)
1517 delay_num >>= ROCKCHIP_MMC_DELAYNUM_OFFSET; in rockchip_mmc_get_phase()
1552 raw_value |= delay_num << ROCKCHIP_MMC_DELAYNUM_OFFSET; in rockchip_mmc_set_phase()
H A Dclk_rv1126.c1852 #define ROCKCHIP_MMC_DELAYNUM_OFFSET 2 macro
1853 #define ROCKCHIP_MMC_DELAYNUM_MASK (0xff << ROCKCHIP_MMC_DELAYNUM_OFFSET)
1890 delay_num >>= ROCKCHIP_MMC_DELAYNUM_OFFSET; in rv1126_mmc_get_phase()
1924 raw_value |= delay_num << ROCKCHIP_MMC_DELAYNUM_OFFSET; in rv1126_mmc_set_phase()
H A Dclk_rk3588.c1807 #define ROCKCHIP_MMC_DELAYNUM_OFFSET 2 macro
1808 #define ROCKCHIP_MMC_DELAYNUM_MASK (0xff << ROCKCHIP_MMC_DELAYNUM_OFFSET)
1843 delay_num >>= ROCKCHIP_MMC_DELAYNUM_OFFSET; in rk3588_mmc_get_phase()
1877 raw_value |= delay_num << ROCKCHIP_MMC_DELAYNUM_OFFSET; in rk3588_mmc_set_phase()
H A Dclk_rk3568.c2879 #define ROCKCHIP_MMC_DELAYNUM_OFFSET 2 macro
2880 #define ROCKCHIP_MMC_DELAYNUM_MASK (0xff << ROCKCHIP_MMC_DELAYNUM_OFFSET)
2919 delay_num >>= ROCKCHIP_MMC_DELAYNUM_OFFSET; in rk3568_mmc_get_phase()
2953 raw_value |= delay_num << ROCKCHIP_MMC_DELAYNUM_OFFSET; in rk3568_mmc_set_phase()