Searched refs:MXC_CCM_CHSCCDR_IPU1_DI0_CLK_SEL_MASK (Results 1 – 7 of 7) sorted by relevance
449 MXC_CCM_CHSCCDR_IPU1_DI0_CLK_SEL_MASK, in setup_display_b850v3()493 MXC_CCM_CHSCCDR_IPU1_DI0_CLK_SEL_MASK, in setup_display_bx50v3()
407 MXC_CCM_CHSCCDR_IPU1_DI0_CLK_SEL_MASK, in setup_display_clock()
349 MXC_CCM_CHSCCDR_IPU1_DI0_CLK_SEL_MASK); in setup_display()
281 MXC_CCM_CHSCCDR_IPU1_DI0_CLK_SEL_MASK); in setup_display()
667 MXC_CCM_CHSCCDR_IPU1_DI0_CLK_SEL_MASK); in imx_setup_hdmi()
406 MXC_CCM_CHSCCDR_IPU1_DI0_CLK_SEL_MASK, in setup_display()
500 #define MXC_CCM_CHSCCDR_IPU1_DI0_CLK_SEL_MASK (0x7) macro