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Searched refs:MCTL_MR0 (Results 1 – 6 of 6) sorted by relevance

/OK3568_Linux_fs/u-boot/arch/arm/include/asm/arch-sunxi/
H A Ddram_sun8i_a33.h174 #define MCTL_MR0 0x1c70 /* CL=11, WR=12 */ macro
H A Ddram_sun8i_a83t.h196 #define MCTL_MR0 0x1c70 /* CL=11, WR=12 */ macro
H A Ddram_sun6i.h348 #define MCTL_MR0 0x1a50 macro
/OK3568_Linux_fs/u-boot/arch/arm/mach-sunxi/
H A Ddram_sun8i_a33.c134 writel(MCTL_MR0, &mctl_ctl->mr0); in auto_set_timing_para()
H A Ddram_sun8i_a83t.c135 writel(MCTL_MR0, &mctl_ctl->mr0); in auto_set_timing_para()
H A Ddram_sun6i.c123 writel(MCTL_MR0, &mctl_phy->mr0); in mctl_channel_init()