Searched refs:FSL_CHASSIS3_RCWSR28_SRDS1_PRTCL_MASK (Results 1 – 3 of 3) sorted by relevance
445 FSL_CHASSIS3_RCWSR28_SRDS1_PRTCL_MASK) in initialize_dpmac_to_slot()599 FSL_CHASSIS3_RCWSR28_SRDS1_PRTCL_MASK) in ls2080a_handle_phy_interface_sgmii()742 FSL_CHASSIS3_RCWSR28_SRDS1_PRTCL_MASK) in ls2080a_handle_phy_interface_qsgmii()807 FSL_CHASSIS3_RCWSR28_SRDS1_PRTCL_MASK) in ls2080a_handle_phy_interface_xsgmii()841 FSL_CHASSIS3_RCWSR28_SRDS1_PRTCL_MASK) in board_eth_init()
239 #define FSL_CHASSIS3_RCWSR28_SRDS1_PRTCL_MASK 0x00FF0000 macro243 #define FSL_CHASSIS3_SRDS1_PRTCL_MASK FSL_CHASSIS3_RCWSR28_SRDS1_PRTCL_MASK
35 FSL_CHASSIS3_RCWSR28_SRDS1_PRTCL_MASK; in board_eth_init()