Searched refs:ENISR_RESET (Results 1 – 11 of 11) sorted by relevance
192 if ((r = (n2k_inb(EN0_ISR) & ENISR_RESET)) != 0) in pcnet_reset_8390()197 n2k_outb(ENISR_RESET, EN0_ISR); /* Ack intr. */ in pcnet_reset_8390()
86 #define ENISR_RESET 0x80 /* Reset completed */ macro
99 while ((z_readb(NE_BASE + NE_EN0_ISR) & ENISR_RESET) == 0) in zorro8390_reset_8390()104 z_writeb(ENISR_RESET, NE_BASE + NE_EN0_ISR); /* Ack intr */ in zorro8390_reset_8390()308 while ((z_readb(ioaddr + NE_EN0_ISR) & ENISR_RESET) == 0) in zorro8390_init()
226 while ((inb(ioaddr + NE_EN0_ISR) & ENISR_RESET) == 0) in apne_probe1()375 while ((inb(NE_BASE+NE_EN0_ISR) & ENISR_RESET) == 0) in apne_reset_8390()380 outb(ENISR_RESET, NE_BASE + NE_EN0_ISR); /* Ack intr. */ in apne_reset_8390()
301 while ((inb(ioaddr + EN0_ISR) & ENISR_RESET) == 0) in ne2k_pci_init_one()485 while ((inb(NE_BASE+EN0_ISR) & ENISR_RESET) == 0) in ne2k_pci_reset_8390()491 outb(ENISR_RESET, NE_BASE + EN0_ISR); in ne2k_pci_reset_8390()
349 while ((inb_p(ioaddr + EN0_ISR) & ENISR_RESET) == 0) in ne_probe1()563 while ((inb_p(NE_BASE+EN0_ISR) & ENISR_RESET) == 0) in ne_reset_8390()568 outb_p(ENISR_RESET, NE_BASE + EN0_ISR); /* Ack intr. */ in ne_reset_8390()
165 while ((ei_inb(addr + NE_EN0_ISR) & ENISR_RESET) == 0) { in mcf8390_reset_8390()172 ei_outb(ENISR_RESET, addr + NE_EN0_ISR); in mcf8390_reset_8390()
202 #define ENISR_RESET 0x80 /* Reset completed */ macro
153 while ((ei_inb(addr + EN0_ISR) & ENISR_RESET) == 0) { in ax_reset_8390()160 ei_outb(ENISR_RESET, addr + EN0_ISR); /* Ack intr. */ in ax_reset_8390()
528 if ((inb_p(nic_base+EN0_ISR) & ENISR_RESET) != 0) in axnet_reset_8390()532 outb_p(ENISR_RESET, nic_base + EN0_ISR); /* Ack intr. */ in axnet_reset_8390()
965 if ((inb_p(nic_base+EN0_ISR) & ENISR_RESET) != 0) in pcnet_reset_8390()969 outb_p(ENISR_RESET, nic_base + EN0_ISR); /* Ack intr. */ in pcnet_reset_8390()