xref: /OK3568_Linux_fs/kernel/drivers/net/ethernet/8390/ne2k-pci.c (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1*4882a593Smuzhiyun /* A Linux device driver for PCI NE2000 clones.
2*4882a593Smuzhiyun  *
3*4882a593Smuzhiyun  * Authors and other copyright holders:
4*4882a593Smuzhiyun  * 1992-2000 by Donald Becker, NE2000 core and various modifications.
5*4882a593Smuzhiyun  * 1995-1998 by Paul Gortmaker, core modifications and PCI support.
6*4882a593Smuzhiyun  * Copyright 1993 assigned to the United States Government as represented
7*4882a593Smuzhiyun  * by the Director, National Security Agency.
8*4882a593Smuzhiyun  *
9*4882a593Smuzhiyun  * This software may be used and distributed according to the terms of
10*4882a593Smuzhiyun  * the GNU General Public License (GPL), incorporated herein by reference.
11*4882a593Smuzhiyun  * Drivers based on or derived from this code fall under the GPL and must
12*4882a593Smuzhiyun  * retain the authorship, copyright and license notice.  This file is not
13*4882a593Smuzhiyun  * a complete program and may only be used when the entire operating
14*4882a593Smuzhiyun  * system is licensed under the GPL.
15*4882a593Smuzhiyun  *
16*4882a593Smuzhiyun  * The author may be reached as becker@scyld.com, or C/O
17*4882a593Smuzhiyun  * Scyld Computing Corporation
18*4882a593Smuzhiyun  * 410 Severn Ave., Suite 210
19*4882a593Smuzhiyun  * Annapolis MD 21403
20*4882a593Smuzhiyun  *
21*4882a593Smuzhiyun  * Issues remaining:
22*4882a593Smuzhiyun  * People are making PCI NE2000 clones! Oh the horror, the horror...
23*4882a593Smuzhiyun  * Limited full-duplex support.
24*4882a593Smuzhiyun  */
25*4882a593Smuzhiyun 
26*4882a593Smuzhiyun #define DRV_NAME	"ne2k-pci"
27*4882a593Smuzhiyun #define DRV_DESCRIPTION	"PCI NE2000 clone driver"
28*4882a593Smuzhiyun #define DRV_AUTHOR	"Donald Becker / Paul Gortmaker"
29*4882a593Smuzhiyun #define DRV_VERSION	"1.03"
30*4882a593Smuzhiyun #define DRV_RELDATE	"9/22/2003"
31*4882a593Smuzhiyun 
32*4882a593Smuzhiyun #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
33*4882a593Smuzhiyun 
34*4882a593Smuzhiyun /* The user-configurable values.
35*4882a593Smuzhiyun  * These may be modified when a driver module is loaded.
36*4882a593Smuzhiyun  */
37*4882a593Smuzhiyun 
38*4882a593Smuzhiyun /* More are supported, limit only on options */
39*4882a593Smuzhiyun #define MAX_UNITS 8
40*4882a593Smuzhiyun 
41*4882a593Smuzhiyun /* Used to pass the full-duplex flag, etc. */
42*4882a593Smuzhiyun static int full_duplex[MAX_UNITS];
43*4882a593Smuzhiyun static int options[MAX_UNITS];
44*4882a593Smuzhiyun 
45*4882a593Smuzhiyun /* Force a non std. amount of memory.  Units are 256 byte pages. */
46*4882a593Smuzhiyun /* #define PACKETBUF_MEMSIZE	0x40 */
47*4882a593Smuzhiyun 
48*4882a593Smuzhiyun 
49*4882a593Smuzhiyun #include <linux/module.h>
50*4882a593Smuzhiyun #include <linux/kernel.h>
51*4882a593Smuzhiyun #include <linux/errno.h>
52*4882a593Smuzhiyun #include <linux/pci.h>
53*4882a593Smuzhiyun #include <linux/init.h>
54*4882a593Smuzhiyun #include <linux/interrupt.h>
55*4882a593Smuzhiyun #include <linux/ethtool.h>
56*4882a593Smuzhiyun #include <linux/netdevice.h>
57*4882a593Smuzhiyun #include <linux/etherdevice.h>
58*4882a593Smuzhiyun 
59*4882a593Smuzhiyun #include <linux/io.h>
60*4882a593Smuzhiyun #include <asm/irq.h>
61*4882a593Smuzhiyun #include <linux/uaccess.h>
62*4882a593Smuzhiyun 
63*4882a593Smuzhiyun #include "8390.h"
64*4882a593Smuzhiyun 
65*4882a593Smuzhiyun static int ne2k_msg_enable;
66*4882a593Smuzhiyun 
67*4882a593Smuzhiyun static const int default_msg_level = (NETIF_MSG_DRV | NETIF_MSG_PROBE |
68*4882a593Smuzhiyun 				      NETIF_MSG_RX_ERR | NETIF_MSG_TX_ERR);
69*4882a593Smuzhiyun 
70*4882a593Smuzhiyun #if defined(__powerpc__)
71*4882a593Smuzhiyun #define inl_le(addr)  le32_to_cpu(inl(addr))
72*4882a593Smuzhiyun #define inw_le(addr)  le16_to_cpu(inw(addr))
73*4882a593Smuzhiyun #endif
74*4882a593Smuzhiyun 
75*4882a593Smuzhiyun MODULE_AUTHOR(DRV_AUTHOR);
76*4882a593Smuzhiyun MODULE_DESCRIPTION(DRV_DESCRIPTION);
77*4882a593Smuzhiyun MODULE_VERSION(DRV_VERSION);
78*4882a593Smuzhiyun MODULE_LICENSE("GPL");
79*4882a593Smuzhiyun 
80*4882a593Smuzhiyun module_param_named(msg_enable, ne2k_msg_enable, int, 0444);
81*4882a593Smuzhiyun module_param_array(options, int, NULL, 0);
82*4882a593Smuzhiyun module_param_array(full_duplex, int, NULL, 0);
83*4882a593Smuzhiyun MODULE_PARM_DESC(msg_enable, "Debug message level (see linux/netdevice.h for bitmap)");
84*4882a593Smuzhiyun MODULE_PARM_DESC(options, "Bit 5: full duplex");
85*4882a593Smuzhiyun MODULE_PARM_DESC(full_duplex, "full duplex setting(s) (1)");
86*4882a593Smuzhiyun 
87*4882a593Smuzhiyun /* Some defines that people can play with if so inclined.
88*4882a593Smuzhiyun  */
89*4882a593Smuzhiyun 
90*4882a593Smuzhiyun /* Use 32 bit data-movement operations instead of 16 bit. */
91*4882a593Smuzhiyun #define USE_LONGIO
92*4882a593Smuzhiyun 
93*4882a593Smuzhiyun /* Do we implement the read before write bugfix ? */
94*4882a593Smuzhiyun /* #define NE_RW_BUGFIX */
95*4882a593Smuzhiyun 
96*4882a593Smuzhiyun /* Flags.  We rename an existing ei_status field to store flags!
97*4882a593Smuzhiyun  * Thus only the low 8 bits are usable for non-init-time flags.
98*4882a593Smuzhiyun  */
99*4882a593Smuzhiyun #define ne2k_flags reg0
100*4882a593Smuzhiyun 
101*4882a593Smuzhiyun enum {
102*4882a593Smuzhiyun 	/* Chip can do only 16/32-bit xfers. */
103*4882a593Smuzhiyun 	ONLY_16BIT_IO = 8, ONLY_32BIT_IO = 4,
104*4882a593Smuzhiyun 	/* User override. */
105*4882a593Smuzhiyun 	FORCE_FDX = 0x20,
106*4882a593Smuzhiyun 	REALTEK_FDX = 0x40, HOLTEK_FDX = 0x80,
107*4882a593Smuzhiyun 	STOP_PG_0x60 = 0x100,
108*4882a593Smuzhiyun };
109*4882a593Smuzhiyun 
110*4882a593Smuzhiyun enum ne2k_pci_chipsets {
111*4882a593Smuzhiyun 	CH_RealTek_RTL_8029 = 0,
112*4882a593Smuzhiyun 	CH_Winbond_89C940,
113*4882a593Smuzhiyun 	CH_Compex_RL2000,
114*4882a593Smuzhiyun 	CH_KTI_ET32P2,
115*4882a593Smuzhiyun 	CH_NetVin_NV5000SC,
116*4882a593Smuzhiyun 	CH_Via_86C926,
117*4882a593Smuzhiyun 	CH_SureCom_NE34,
118*4882a593Smuzhiyun 	CH_Winbond_W89C940F,
119*4882a593Smuzhiyun 	CH_Holtek_HT80232,
120*4882a593Smuzhiyun 	CH_Holtek_HT80229,
121*4882a593Smuzhiyun 	CH_Winbond_89C940_8c4a,
122*4882a593Smuzhiyun };
123*4882a593Smuzhiyun 
124*4882a593Smuzhiyun 
125*4882a593Smuzhiyun static struct {
126*4882a593Smuzhiyun 	char *name;
127*4882a593Smuzhiyun 	int flags;
128*4882a593Smuzhiyun } pci_clone_list[] = {
129*4882a593Smuzhiyun 	{"RealTek RTL-8029(AS)", REALTEK_FDX},
130*4882a593Smuzhiyun 	{"Winbond 89C940", 0},
131*4882a593Smuzhiyun 	{"Compex RL2000", 0},
132*4882a593Smuzhiyun 	{"KTI ET32P2", 0},
133*4882a593Smuzhiyun 	{"NetVin NV5000SC", 0},
134*4882a593Smuzhiyun 	{"Via 86C926", ONLY_16BIT_IO},
135*4882a593Smuzhiyun 	{"SureCom NE34", 0},
136*4882a593Smuzhiyun 	{"Winbond W89C940F", 0},
137*4882a593Smuzhiyun 	{"Holtek HT80232", ONLY_16BIT_IO | HOLTEK_FDX},
138*4882a593Smuzhiyun 	{"Holtek HT80229", ONLY_32BIT_IO | HOLTEK_FDX | STOP_PG_0x60 },
139*4882a593Smuzhiyun 	{"Winbond W89C940(misprogrammed)", 0},
140*4882a593Smuzhiyun 	{NULL,}
141*4882a593Smuzhiyun };
142*4882a593Smuzhiyun 
143*4882a593Smuzhiyun 
144*4882a593Smuzhiyun static const struct pci_device_id ne2k_pci_tbl[] = {
145*4882a593Smuzhiyun 	{ 0x10ec, 0x8029, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CH_RealTek_RTL_8029 },
146*4882a593Smuzhiyun 	{ 0x1050, 0x0940, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CH_Winbond_89C940 },
147*4882a593Smuzhiyun 	{ 0x11f6, 0x1401, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CH_Compex_RL2000 },
148*4882a593Smuzhiyun 	{ 0x8e2e, 0x3000, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CH_KTI_ET32P2 },
149*4882a593Smuzhiyun 	{ 0x4a14, 0x5000, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CH_NetVin_NV5000SC },
150*4882a593Smuzhiyun 	{ 0x1106, 0x0926, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CH_Via_86C926 },
151*4882a593Smuzhiyun 	{ 0x10bd, 0x0e34, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CH_SureCom_NE34 },
152*4882a593Smuzhiyun 	{ 0x1050, 0x5a5a, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CH_Winbond_W89C940F },
153*4882a593Smuzhiyun 	{ 0x12c3, 0x0058, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CH_Holtek_HT80232 },
154*4882a593Smuzhiyun 	{ 0x12c3, 0x5598, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CH_Holtek_HT80229 },
155*4882a593Smuzhiyun 	{ 0x8c4a, 0x1980, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CH_Winbond_89C940_8c4a },
156*4882a593Smuzhiyun 	{ 0, }
157*4882a593Smuzhiyun };
158*4882a593Smuzhiyun 
159*4882a593Smuzhiyun MODULE_DEVICE_TABLE(pci, ne2k_pci_tbl);
160*4882a593Smuzhiyun 
161*4882a593Smuzhiyun 
162*4882a593Smuzhiyun /* ---- No user-serviceable parts below ---- */
163*4882a593Smuzhiyun 
164*4882a593Smuzhiyun #define NE_BASE	 (dev->base_addr)
165*4882a593Smuzhiyun #define NE_CMD		0x00
166*4882a593Smuzhiyun #define NE_DATAPORT	0x10	/* NatSemi-defined port window offset. */
167*4882a593Smuzhiyun #define NE_RESET	0x1f	/* Issue a read to reset, a write to clear. */
168*4882a593Smuzhiyun #define NE_IO_EXTENT	0x20
169*4882a593Smuzhiyun 
170*4882a593Smuzhiyun #define NESM_START_PG	0x40	/* First page of TX buffer */
171*4882a593Smuzhiyun #define NESM_STOP_PG	0x80	/* Last page +1 of RX ring */
172*4882a593Smuzhiyun 
173*4882a593Smuzhiyun 
174*4882a593Smuzhiyun static int ne2k_pci_open(struct net_device *dev);
175*4882a593Smuzhiyun static int ne2k_pci_close(struct net_device *dev);
176*4882a593Smuzhiyun 
177*4882a593Smuzhiyun static void ne2k_pci_reset_8390(struct net_device *dev);
178*4882a593Smuzhiyun static void ne2k_pci_get_8390_hdr(struct net_device *dev,
179*4882a593Smuzhiyun 				  struct e8390_pkt_hdr *hdr, int ring_page);
180*4882a593Smuzhiyun static void ne2k_pci_block_input(struct net_device *dev, int count,
181*4882a593Smuzhiyun 				 struct sk_buff *skb, int ring_offset);
182*4882a593Smuzhiyun static void ne2k_pci_block_output(struct net_device *dev, const int count,
183*4882a593Smuzhiyun 				  const unsigned char *buf,
184*4882a593Smuzhiyun 				  const int start_page);
185*4882a593Smuzhiyun static const struct ethtool_ops ne2k_pci_ethtool_ops;
186*4882a593Smuzhiyun 
187*4882a593Smuzhiyun 
188*4882a593Smuzhiyun 
189*4882a593Smuzhiyun /* There is no room in the standard 8390 structure for extra info we need,
190*4882a593Smuzhiyun  * so we build a meta/outer-wrapper structure..
191*4882a593Smuzhiyun  */
192*4882a593Smuzhiyun struct ne2k_pci_card {
193*4882a593Smuzhiyun 	struct net_device *dev;
194*4882a593Smuzhiyun 	struct pci_dev *pci_dev;
195*4882a593Smuzhiyun };
196*4882a593Smuzhiyun 
197*4882a593Smuzhiyun 
198*4882a593Smuzhiyun 
199*4882a593Smuzhiyun /* NEx000-clone boards have a Station Address (SA) PROM (SAPROM) in the packet
200*4882a593Smuzhiyun  * buffer memory space.  By-the-spec NE2000 clones have 0x57,0x57 in bytes
201*4882a593Smuzhiyun  * 0x0e,0x0f of the SAPROM, while other supposed NE2000 clones must be
202*4882a593Smuzhiyun  * detected by their SA prefix.
203*4882a593Smuzhiyun  *
204*4882a593Smuzhiyun  * Reading the SAPROM from a word-wide card with the 8390 set in byte-wide
205*4882a593Smuzhiyun  * mode results in doubled values, which can be detected and compensated for.
206*4882a593Smuzhiyun  *
207*4882a593Smuzhiyun  * The probe is also responsible for initializing the card and filling
208*4882a593Smuzhiyun  * in the 'dev' and 'ei_status' structures.
209*4882a593Smuzhiyun  */
210*4882a593Smuzhiyun 
211*4882a593Smuzhiyun static const struct net_device_ops ne2k_netdev_ops = {
212*4882a593Smuzhiyun 	.ndo_open		= ne2k_pci_open,
213*4882a593Smuzhiyun 	.ndo_stop		= ne2k_pci_close,
214*4882a593Smuzhiyun 	.ndo_start_xmit		= ei_start_xmit,
215*4882a593Smuzhiyun 	.ndo_tx_timeout		= ei_tx_timeout,
216*4882a593Smuzhiyun 	.ndo_get_stats		= ei_get_stats,
217*4882a593Smuzhiyun 	.ndo_set_rx_mode	= ei_set_multicast_list,
218*4882a593Smuzhiyun 	.ndo_validate_addr	= eth_validate_addr,
219*4882a593Smuzhiyun 	.ndo_set_mac_address	= eth_mac_addr,
220*4882a593Smuzhiyun #ifdef CONFIG_NET_POLL_CONTROLLER
221*4882a593Smuzhiyun 	.ndo_poll_controller = ei_poll,
222*4882a593Smuzhiyun #endif
223*4882a593Smuzhiyun };
224*4882a593Smuzhiyun 
ne2k_pci_init_one(struct pci_dev * pdev,const struct pci_device_id * ent)225*4882a593Smuzhiyun static int ne2k_pci_init_one(struct pci_dev *pdev,
226*4882a593Smuzhiyun 			     const struct pci_device_id *ent)
227*4882a593Smuzhiyun {
228*4882a593Smuzhiyun 	struct net_device *dev;
229*4882a593Smuzhiyun 	int i;
230*4882a593Smuzhiyun 	unsigned char SA_prom[32];
231*4882a593Smuzhiyun 	int start_page, stop_page;
232*4882a593Smuzhiyun 	int irq, reg0, chip_idx = ent->driver_data;
233*4882a593Smuzhiyun 	static unsigned int fnd_cnt;
234*4882a593Smuzhiyun 	long ioaddr;
235*4882a593Smuzhiyun 	int flags = pci_clone_list[chip_idx].flags;
236*4882a593Smuzhiyun 	struct ei_device *ei_local;
237*4882a593Smuzhiyun 
238*4882a593Smuzhiyun 	fnd_cnt++;
239*4882a593Smuzhiyun 
240*4882a593Smuzhiyun 	i = pci_enable_device(pdev);
241*4882a593Smuzhiyun 	if (i)
242*4882a593Smuzhiyun 		return i;
243*4882a593Smuzhiyun 
244*4882a593Smuzhiyun 	ioaddr = pci_resource_start(pdev, 0);
245*4882a593Smuzhiyun 	irq = pdev->irq;
246*4882a593Smuzhiyun 
247*4882a593Smuzhiyun 	if (!ioaddr || ((pci_resource_flags(pdev, 0) & IORESOURCE_IO) == 0)) {
248*4882a593Smuzhiyun 		dev_err(&pdev->dev, "no I/O resource at PCI BAR #0\n");
249*4882a593Smuzhiyun 		goto err_out;
250*4882a593Smuzhiyun 	}
251*4882a593Smuzhiyun 
252*4882a593Smuzhiyun 	if (!request_region(ioaddr, NE_IO_EXTENT, DRV_NAME)) {
253*4882a593Smuzhiyun 		dev_err(&pdev->dev, "I/O resource 0x%x @ 0x%lx busy\n",
254*4882a593Smuzhiyun 			NE_IO_EXTENT, ioaddr);
255*4882a593Smuzhiyun 		goto err_out;
256*4882a593Smuzhiyun 	}
257*4882a593Smuzhiyun 
258*4882a593Smuzhiyun 	reg0 = inb(ioaddr);
259*4882a593Smuzhiyun 	if (reg0 == 0xFF)
260*4882a593Smuzhiyun 		goto err_out_free_res;
261*4882a593Smuzhiyun 
262*4882a593Smuzhiyun 	/* Do a preliminary verification that we have a 8390. */
263*4882a593Smuzhiyun 	{
264*4882a593Smuzhiyun 		int regd;
265*4882a593Smuzhiyun 
266*4882a593Smuzhiyun 		outb(E8390_NODMA + E8390_PAGE1 + E8390_STOP, ioaddr + E8390_CMD);
267*4882a593Smuzhiyun 		regd = inb(ioaddr + 0x0d);
268*4882a593Smuzhiyun 		outb(0xff, ioaddr + 0x0d);
269*4882a593Smuzhiyun 		outb(E8390_NODMA + E8390_PAGE0, ioaddr + E8390_CMD);
270*4882a593Smuzhiyun 		/* Clear the counter by reading. */
271*4882a593Smuzhiyun 		inb(ioaddr + EN0_COUNTER0);
272*4882a593Smuzhiyun 		if (inb(ioaddr + EN0_COUNTER0) != 0) {
273*4882a593Smuzhiyun 			outb(reg0, ioaddr);
274*4882a593Smuzhiyun 			/*  Restore the old values. */
275*4882a593Smuzhiyun 			outb(regd, ioaddr + 0x0d);
276*4882a593Smuzhiyun 			goto err_out_free_res;
277*4882a593Smuzhiyun 		}
278*4882a593Smuzhiyun 	}
279*4882a593Smuzhiyun 
280*4882a593Smuzhiyun 	/* Allocate net_device, dev->priv; fill in 8390 specific dev fields. */
281*4882a593Smuzhiyun 	dev = alloc_ei_netdev();
282*4882a593Smuzhiyun 	if (!dev) {
283*4882a593Smuzhiyun 		dev_err(&pdev->dev, "cannot allocate ethernet device\n");
284*4882a593Smuzhiyun 		goto err_out_free_res;
285*4882a593Smuzhiyun 	}
286*4882a593Smuzhiyun 	dev->netdev_ops = &ne2k_netdev_ops;
287*4882a593Smuzhiyun 	ei_local = netdev_priv(dev);
288*4882a593Smuzhiyun 	ei_local->msg_enable = netif_msg_init(ne2k_msg_enable, default_msg_level);
289*4882a593Smuzhiyun 
290*4882a593Smuzhiyun 	SET_NETDEV_DEV(dev, &pdev->dev);
291*4882a593Smuzhiyun 
292*4882a593Smuzhiyun 	/* Reset card. Who knows what dain-bramaged state it was left in. */
293*4882a593Smuzhiyun 	{
294*4882a593Smuzhiyun 		unsigned long reset_start_time = jiffies;
295*4882a593Smuzhiyun 
296*4882a593Smuzhiyun 		outb(inb(ioaddr + NE_RESET), ioaddr + NE_RESET);
297*4882a593Smuzhiyun 
298*4882a593Smuzhiyun 		/* This looks like a horrible timing loop, but it should never
299*4882a593Smuzhiyun 		 * take more than a few cycles.
300*4882a593Smuzhiyun 		 */
301*4882a593Smuzhiyun 		while ((inb(ioaddr + EN0_ISR) & ENISR_RESET) == 0)
302*4882a593Smuzhiyun 			/* Limit wait: '2' avoids jiffy roll-over. */
303*4882a593Smuzhiyun 			if (jiffies - reset_start_time > 2) {
304*4882a593Smuzhiyun 				dev_err(&pdev->dev,
305*4882a593Smuzhiyun 					"Card failure (no reset ack).\n");
306*4882a593Smuzhiyun 				goto err_out_free_netdev;
307*4882a593Smuzhiyun 			}
308*4882a593Smuzhiyun 		/* Ack all intr. */
309*4882a593Smuzhiyun 		outb(0xff, ioaddr + EN0_ISR);
310*4882a593Smuzhiyun 	}
311*4882a593Smuzhiyun 
312*4882a593Smuzhiyun 	/* Read the 16 bytes of station address PROM.
313*4882a593Smuzhiyun 	 * We must first initialize registers, similar
314*4882a593Smuzhiyun 	 * to NS8390_init(eifdev, 0).
315*4882a593Smuzhiyun 	 * We can't reliably read the SAPROM address without this.
316*4882a593Smuzhiyun 	 * (I learned the hard way!).
317*4882a593Smuzhiyun 	 */
318*4882a593Smuzhiyun 	{
319*4882a593Smuzhiyun 		struct {unsigned char value, offset; } program_seq[] = {
320*4882a593Smuzhiyun 			/* Select page 0 */
321*4882a593Smuzhiyun 			{E8390_NODMA + E8390_PAGE0 + E8390_STOP, E8390_CMD},
322*4882a593Smuzhiyun 			/* Set word-wide access */
323*4882a593Smuzhiyun 			{0x49,	EN0_DCFG},
324*4882a593Smuzhiyun 			/* Clear the count regs. */
325*4882a593Smuzhiyun 			{0x00,	EN0_RCNTLO},
326*4882a593Smuzhiyun 			/* Mask completion IRQ */
327*4882a593Smuzhiyun 			{0x00,	EN0_RCNTHI},
328*4882a593Smuzhiyun 			{0x00,	EN0_IMR},
329*4882a593Smuzhiyun 			{0xFF,	EN0_ISR},
330*4882a593Smuzhiyun 			/* 0x20 Set to monitor */
331*4882a593Smuzhiyun 			{E8390_RXOFF, EN0_RXCR},
332*4882a593Smuzhiyun 			/* 0x02 and loopback mode */
333*4882a593Smuzhiyun 			{E8390_TXOFF, EN0_TXCR},
334*4882a593Smuzhiyun 			{32,	EN0_RCNTLO},
335*4882a593Smuzhiyun 			{0x00,	EN0_RCNTHI},
336*4882a593Smuzhiyun 			/* DMA starting at 0x0000 */
337*4882a593Smuzhiyun 			{0x00,	EN0_RSARLO},
338*4882a593Smuzhiyun 			{0x00,	EN0_RSARHI},
339*4882a593Smuzhiyun 			{E8390_RREAD+E8390_START, E8390_CMD},
340*4882a593Smuzhiyun 		};
341*4882a593Smuzhiyun 		for (i = 0; i < ARRAY_SIZE(program_seq); i++)
342*4882a593Smuzhiyun 			outb(program_seq[i].value,
343*4882a593Smuzhiyun 			     ioaddr + program_seq[i].offset);
344*4882a593Smuzhiyun 
345*4882a593Smuzhiyun 	}
346*4882a593Smuzhiyun 
347*4882a593Smuzhiyun 	/* Note: all PCI cards have at least 16 bit access, so we don't have
348*4882a593Smuzhiyun 	 * to check for 8 bit cards.  Most cards permit 32 bit access.
349*4882a593Smuzhiyun 	 */
350*4882a593Smuzhiyun 	if (flags & ONLY_32BIT_IO) {
351*4882a593Smuzhiyun 		for (i = 0; i < 4 ; i++)
352*4882a593Smuzhiyun 			((u32 *)SA_prom)[i] = le32_to_cpu(inl(ioaddr + NE_DATAPORT));
353*4882a593Smuzhiyun 	} else
354*4882a593Smuzhiyun 		for (i = 0; i < 32 /* sizeof(SA_prom )*/; i++)
355*4882a593Smuzhiyun 			SA_prom[i] = inb(ioaddr + NE_DATAPORT);
356*4882a593Smuzhiyun 
357*4882a593Smuzhiyun 	/* We always set the 8390 registers for word mode. */
358*4882a593Smuzhiyun 	outb(0x49, ioaddr + EN0_DCFG);
359*4882a593Smuzhiyun 	start_page = NESM_START_PG;
360*4882a593Smuzhiyun 
361*4882a593Smuzhiyun 	stop_page = flags & STOP_PG_0x60 ? 0x60 : NESM_STOP_PG;
362*4882a593Smuzhiyun 
363*4882a593Smuzhiyun 	/* Set up the rest of the parameters. */
364*4882a593Smuzhiyun 	dev->irq = irq;
365*4882a593Smuzhiyun 	dev->base_addr = ioaddr;
366*4882a593Smuzhiyun 	pci_set_drvdata(pdev, dev);
367*4882a593Smuzhiyun 
368*4882a593Smuzhiyun 	ei_status.name = pci_clone_list[chip_idx].name;
369*4882a593Smuzhiyun 	ei_status.tx_start_page = start_page;
370*4882a593Smuzhiyun 	ei_status.stop_page = stop_page;
371*4882a593Smuzhiyun 	ei_status.word16 = 1;
372*4882a593Smuzhiyun 	ei_status.ne2k_flags = flags;
373*4882a593Smuzhiyun 	if (fnd_cnt < MAX_UNITS) {
374*4882a593Smuzhiyun 		if (full_duplex[fnd_cnt] > 0 || (options[fnd_cnt] & FORCE_FDX))
375*4882a593Smuzhiyun 			ei_status.ne2k_flags |= FORCE_FDX;
376*4882a593Smuzhiyun 	}
377*4882a593Smuzhiyun 
378*4882a593Smuzhiyun 	ei_status.rx_start_page = start_page + TX_PAGES;
379*4882a593Smuzhiyun #ifdef PACKETBUF_MEMSIZE
380*4882a593Smuzhiyun 	/* Allow the packet buffer size to be overridden by know-it-alls. */
381*4882a593Smuzhiyun 	ei_status.stop_page = ei_status.tx_start_page + PACKETBUF_MEMSIZE;
382*4882a593Smuzhiyun #endif
383*4882a593Smuzhiyun 
384*4882a593Smuzhiyun 	ei_status.reset_8390 = &ne2k_pci_reset_8390;
385*4882a593Smuzhiyun 	ei_status.block_input = &ne2k_pci_block_input;
386*4882a593Smuzhiyun 	ei_status.block_output = &ne2k_pci_block_output;
387*4882a593Smuzhiyun 	ei_status.get_8390_hdr = &ne2k_pci_get_8390_hdr;
388*4882a593Smuzhiyun 	ei_status.priv = (unsigned long) pdev;
389*4882a593Smuzhiyun 
390*4882a593Smuzhiyun 	dev->ethtool_ops = &ne2k_pci_ethtool_ops;
391*4882a593Smuzhiyun 	NS8390_init(dev, 0);
392*4882a593Smuzhiyun 
393*4882a593Smuzhiyun 	memcpy(dev->dev_addr, SA_prom, dev->addr_len);
394*4882a593Smuzhiyun 
395*4882a593Smuzhiyun 	i = register_netdev(dev);
396*4882a593Smuzhiyun 	if (i)
397*4882a593Smuzhiyun 		goto err_out_free_netdev;
398*4882a593Smuzhiyun 
399*4882a593Smuzhiyun 	netdev_info(dev, "%s found at %#lx, IRQ %d, %pM.\n",
400*4882a593Smuzhiyun 		    pci_clone_list[chip_idx].name, ioaddr, dev->irq,
401*4882a593Smuzhiyun 		    dev->dev_addr);
402*4882a593Smuzhiyun 
403*4882a593Smuzhiyun 	return 0;
404*4882a593Smuzhiyun 
405*4882a593Smuzhiyun err_out_free_netdev:
406*4882a593Smuzhiyun 	free_netdev(dev);
407*4882a593Smuzhiyun err_out_free_res:
408*4882a593Smuzhiyun 	release_region(ioaddr, NE_IO_EXTENT);
409*4882a593Smuzhiyun err_out:
410*4882a593Smuzhiyun 	pci_disable_device(pdev);
411*4882a593Smuzhiyun 	return -ENODEV;
412*4882a593Smuzhiyun }
413*4882a593Smuzhiyun 
414*4882a593Smuzhiyun /* Magic incantation sequence for full duplex on the supported cards.
415*4882a593Smuzhiyun  */
set_realtek_fdx(struct net_device * dev)416*4882a593Smuzhiyun static inline int set_realtek_fdx(struct net_device *dev)
417*4882a593Smuzhiyun {
418*4882a593Smuzhiyun 	long ioaddr = dev->base_addr;
419*4882a593Smuzhiyun 
420*4882a593Smuzhiyun 	outb(0xC0 + E8390_NODMA, ioaddr + NE_CMD); /* Page 3 */
421*4882a593Smuzhiyun 	outb(0xC0, ioaddr + 0x01); /* Enable writes to CONFIG3 */
422*4882a593Smuzhiyun 	outb(0x40, ioaddr + 0x06); /* Enable full duplex */
423*4882a593Smuzhiyun 	outb(0x00, ioaddr + 0x01); /* Disable writes to CONFIG3 */
424*4882a593Smuzhiyun 	outb(E8390_PAGE0 + E8390_NODMA, ioaddr + NE_CMD); /* Page 0 */
425*4882a593Smuzhiyun 	return 0;
426*4882a593Smuzhiyun }
427*4882a593Smuzhiyun 
set_holtek_fdx(struct net_device * dev)428*4882a593Smuzhiyun static inline int set_holtek_fdx(struct net_device *dev)
429*4882a593Smuzhiyun {
430*4882a593Smuzhiyun 	long ioaddr = dev->base_addr;
431*4882a593Smuzhiyun 
432*4882a593Smuzhiyun 	outb(inb(ioaddr + 0x20) | 0x80, ioaddr + 0x20);
433*4882a593Smuzhiyun 	return 0;
434*4882a593Smuzhiyun }
435*4882a593Smuzhiyun 
ne2k_pci_set_fdx(struct net_device * dev)436*4882a593Smuzhiyun static int ne2k_pci_set_fdx(struct net_device *dev)
437*4882a593Smuzhiyun {
438*4882a593Smuzhiyun 	if (ei_status.ne2k_flags & REALTEK_FDX)
439*4882a593Smuzhiyun 		return set_realtek_fdx(dev);
440*4882a593Smuzhiyun 	else if (ei_status.ne2k_flags & HOLTEK_FDX)
441*4882a593Smuzhiyun 		return set_holtek_fdx(dev);
442*4882a593Smuzhiyun 
443*4882a593Smuzhiyun 	return -EOPNOTSUPP;
444*4882a593Smuzhiyun }
445*4882a593Smuzhiyun 
ne2k_pci_open(struct net_device * dev)446*4882a593Smuzhiyun static int ne2k_pci_open(struct net_device *dev)
447*4882a593Smuzhiyun {
448*4882a593Smuzhiyun 	int ret = request_irq(dev->irq, ei_interrupt, IRQF_SHARED,
449*4882a593Smuzhiyun 			      dev->name, dev);
450*4882a593Smuzhiyun 
451*4882a593Smuzhiyun 	if (ret)
452*4882a593Smuzhiyun 		return ret;
453*4882a593Smuzhiyun 
454*4882a593Smuzhiyun 	if (ei_status.ne2k_flags & FORCE_FDX)
455*4882a593Smuzhiyun 		ne2k_pci_set_fdx(dev);
456*4882a593Smuzhiyun 
457*4882a593Smuzhiyun 	ei_open(dev);
458*4882a593Smuzhiyun 	return 0;
459*4882a593Smuzhiyun }
460*4882a593Smuzhiyun 
ne2k_pci_close(struct net_device * dev)461*4882a593Smuzhiyun static int ne2k_pci_close(struct net_device *dev)
462*4882a593Smuzhiyun {
463*4882a593Smuzhiyun 	ei_close(dev);
464*4882a593Smuzhiyun 	free_irq(dev->irq, dev);
465*4882a593Smuzhiyun 	return 0;
466*4882a593Smuzhiyun }
467*4882a593Smuzhiyun 
468*4882a593Smuzhiyun /* Hard reset the card.  This used to pause for the same period that a
469*4882a593Smuzhiyun  * 8390 reset command required, but that shouldn't be necessary.
470*4882a593Smuzhiyun  */
ne2k_pci_reset_8390(struct net_device * dev)471*4882a593Smuzhiyun static void ne2k_pci_reset_8390(struct net_device *dev)
472*4882a593Smuzhiyun {
473*4882a593Smuzhiyun 	unsigned long reset_start_time = jiffies;
474*4882a593Smuzhiyun 	struct ei_device *ei_local = netdev_priv(dev);
475*4882a593Smuzhiyun 
476*4882a593Smuzhiyun 	netif_dbg(ei_local, hw, dev, "resetting the 8390 t=%ld...\n",
477*4882a593Smuzhiyun 		  jiffies);
478*4882a593Smuzhiyun 
479*4882a593Smuzhiyun 	outb(inb(NE_BASE + NE_RESET), NE_BASE + NE_RESET);
480*4882a593Smuzhiyun 
481*4882a593Smuzhiyun 	ei_status.txing = 0;
482*4882a593Smuzhiyun 	ei_status.dmaing = 0;
483*4882a593Smuzhiyun 
484*4882a593Smuzhiyun 	/* This check _should_not_ be necessary, omit eventually. */
485*4882a593Smuzhiyun 	while ((inb(NE_BASE+EN0_ISR) & ENISR_RESET) == 0)
486*4882a593Smuzhiyun 		if (jiffies - reset_start_time > 2) {
487*4882a593Smuzhiyun 			netdev_err(dev, "%s did not complete.\n", __func__);
488*4882a593Smuzhiyun 			break;
489*4882a593Smuzhiyun 		}
490*4882a593Smuzhiyun 	/* Ack intr. */
491*4882a593Smuzhiyun 	outb(ENISR_RESET, NE_BASE + EN0_ISR);
492*4882a593Smuzhiyun }
493*4882a593Smuzhiyun 
494*4882a593Smuzhiyun /* Grab the 8390 specific header. Similar to the block_input routine, but
495*4882a593Smuzhiyun  * we don't need to be concerned with ring wrap as the header will be at
496*4882a593Smuzhiyun  * the start of a page, so we optimize accordingly.
497*4882a593Smuzhiyun  */
498*4882a593Smuzhiyun 
ne2k_pci_get_8390_hdr(struct net_device * dev,struct e8390_pkt_hdr * hdr,int ring_page)499*4882a593Smuzhiyun static void ne2k_pci_get_8390_hdr(struct net_device *dev,
500*4882a593Smuzhiyun 				  struct e8390_pkt_hdr *hdr, int ring_page)
501*4882a593Smuzhiyun {
502*4882a593Smuzhiyun 
503*4882a593Smuzhiyun 	long nic_base = dev->base_addr;
504*4882a593Smuzhiyun 
505*4882a593Smuzhiyun 	/* This *shouldn't* happen. If it does, it's the last thing you'll see
506*4882a593Smuzhiyun 	 */
507*4882a593Smuzhiyun 	if (ei_status.dmaing) {
508*4882a593Smuzhiyun 		netdev_err(dev, "DMAing conflict in %s [DMAstat:%d][irqlock:%d].\n",
509*4882a593Smuzhiyun 			   __func__, ei_status.dmaing, ei_status.irqlock);
510*4882a593Smuzhiyun 		return;
511*4882a593Smuzhiyun 	}
512*4882a593Smuzhiyun 
513*4882a593Smuzhiyun 	ei_status.dmaing |= 0x01;
514*4882a593Smuzhiyun 	outb(E8390_NODMA + E8390_PAGE0 + E8390_START, nic_base + NE_CMD);
515*4882a593Smuzhiyun 	outb(sizeof(struct e8390_pkt_hdr), nic_base + EN0_RCNTLO);
516*4882a593Smuzhiyun 	outb(0, nic_base + EN0_RCNTHI);
517*4882a593Smuzhiyun 	outb(0, nic_base + EN0_RSARLO);		/* On page boundary */
518*4882a593Smuzhiyun 	outb(ring_page, nic_base + EN0_RSARHI);
519*4882a593Smuzhiyun 	outb(E8390_RREAD+E8390_START, nic_base + NE_CMD);
520*4882a593Smuzhiyun 
521*4882a593Smuzhiyun 	if (ei_status.ne2k_flags & ONLY_16BIT_IO) {
522*4882a593Smuzhiyun 		insw(NE_BASE + NE_DATAPORT, hdr,
523*4882a593Smuzhiyun 		     sizeof(struct e8390_pkt_hdr) >> 1);
524*4882a593Smuzhiyun 	} else {
525*4882a593Smuzhiyun 		*(u32 *)hdr = le32_to_cpu(inl(NE_BASE + NE_DATAPORT));
526*4882a593Smuzhiyun 		le16_to_cpus(&hdr->count);
527*4882a593Smuzhiyun 	}
528*4882a593Smuzhiyun 	/* Ack intr. */
529*4882a593Smuzhiyun 	outb(ENISR_RDC, nic_base + EN0_ISR);
530*4882a593Smuzhiyun 	ei_status.dmaing &= ~0x01;
531*4882a593Smuzhiyun }
532*4882a593Smuzhiyun 
533*4882a593Smuzhiyun /* Block input and output, similar to the Crynwr packet driver.  If you
534*4882a593Smuzhiyun  *are porting to a new ethercard, look at the packet driver source for hints.
535*4882a593Smuzhiyun  *The NEx000 doesn't share the on-board packet memory -- you have to put
536*4882a593Smuzhiyun  *the packet out through the "remote DMA" dataport using outb.
537*4882a593Smuzhiyun  */
538*4882a593Smuzhiyun 
ne2k_pci_block_input(struct net_device * dev,int count,struct sk_buff * skb,int ring_offset)539*4882a593Smuzhiyun static void ne2k_pci_block_input(struct net_device *dev, int count,
540*4882a593Smuzhiyun 				 struct sk_buff *skb, int ring_offset)
541*4882a593Smuzhiyun {
542*4882a593Smuzhiyun 	long nic_base = dev->base_addr;
543*4882a593Smuzhiyun 	char *buf = skb->data;
544*4882a593Smuzhiyun 
545*4882a593Smuzhiyun 	/* This *shouldn't* happen.
546*4882a593Smuzhiyun 	 * If it does, it's the last thing you'll see.
547*4882a593Smuzhiyun 	 */
548*4882a593Smuzhiyun 	if (ei_status.dmaing) {
549*4882a593Smuzhiyun 		netdev_err(dev, "DMAing conflict in %s [DMAstat:%d][irqlock:%d]\n",
550*4882a593Smuzhiyun 			   __func__, ei_status.dmaing, ei_status.irqlock);
551*4882a593Smuzhiyun 		return;
552*4882a593Smuzhiyun 	}
553*4882a593Smuzhiyun 	ei_status.dmaing |= 0x01;
554*4882a593Smuzhiyun 	if (ei_status.ne2k_flags & ONLY_32BIT_IO)
555*4882a593Smuzhiyun 		count = (count + 3) & 0xFFFC;
556*4882a593Smuzhiyun 	outb(E8390_NODMA + E8390_PAGE0 + E8390_START, nic_base + NE_CMD);
557*4882a593Smuzhiyun 	outb(count & 0xff, nic_base + EN0_RCNTLO);
558*4882a593Smuzhiyun 	outb(count >> 8, nic_base + EN0_RCNTHI);
559*4882a593Smuzhiyun 	outb(ring_offset & 0xff, nic_base + EN0_RSARLO);
560*4882a593Smuzhiyun 	outb(ring_offset >> 8, nic_base + EN0_RSARHI);
561*4882a593Smuzhiyun 	outb(E8390_RREAD + E8390_START, nic_base + NE_CMD);
562*4882a593Smuzhiyun 
563*4882a593Smuzhiyun 	if (ei_status.ne2k_flags & ONLY_16BIT_IO) {
564*4882a593Smuzhiyun 		insw(NE_BASE + NE_DATAPORT, buf, count >> 1);
565*4882a593Smuzhiyun 		if (count & 0x01)
566*4882a593Smuzhiyun 			buf[count-1] = inb(NE_BASE + NE_DATAPORT);
567*4882a593Smuzhiyun 	} else {
568*4882a593Smuzhiyun 		insl(NE_BASE + NE_DATAPORT, buf, count >> 2);
569*4882a593Smuzhiyun 		if (count & 3) {
570*4882a593Smuzhiyun 			buf += count & ~3;
571*4882a593Smuzhiyun 			if (count & 2) {
572*4882a593Smuzhiyun 				__le16 *b = (__le16 *)buf;
573*4882a593Smuzhiyun 
574*4882a593Smuzhiyun 				*b++ = cpu_to_le16(inw(NE_BASE + NE_DATAPORT));
575*4882a593Smuzhiyun 				buf = (char *)b;
576*4882a593Smuzhiyun 			}
577*4882a593Smuzhiyun 			if (count & 1)
578*4882a593Smuzhiyun 				*buf = inb(NE_BASE + NE_DATAPORT);
579*4882a593Smuzhiyun 		}
580*4882a593Smuzhiyun 	}
581*4882a593Smuzhiyun 	/* Ack intr. */
582*4882a593Smuzhiyun 	outb(ENISR_RDC, nic_base + EN0_ISR);
583*4882a593Smuzhiyun 	ei_status.dmaing &= ~0x01;
584*4882a593Smuzhiyun }
585*4882a593Smuzhiyun 
ne2k_pci_block_output(struct net_device * dev,int count,const unsigned char * buf,const int start_page)586*4882a593Smuzhiyun static void ne2k_pci_block_output(struct net_device *dev, int count,
587*4882a593Smuzhiyun 		const unsigned char *buf, const int start_page)
588*4882a593Smuzhiyun {
589*4882a593Smuzhiyun 	long nic_base = NE_BASE;
590*4882a593Smuzhiyun 	unsigned long dma_start;
591*4882a593Smuzhiyun 
592*4882a593Smuzhiyun 	/* On little-endian it's always safe to round the count up for
593*4882a593Smuzhiyun 	 * word writes.
594*4882a593Smuzhiyun 	 */
595*4882a593Smuzhiyun 	if (ei_status.ne2k_flags & ONLY_32BIT_IO)
596*4882a593Smuzhiyun 		count = (count + 3) & 0xFFFC;
597*4882a593Smuzhiyun 	else
598*4882a593Smuzhiyun 		if (count & 0x01)
599*4882a593Smuzhiyun 			count++;
600*4882a593Smuzhiyun 
601*4882a593Smuzhiyun 	/* This *shouldn't* happen.
602*4882a593Smuzhiyun 	 * If it does, it's the last thing you'll see.
603*4882a593Smuzhiyun 	 */
604*4882a593Smuzhiyun 	if (ei_status.dmaing) {
605*4882a593Smuzhiyun 		netdev_err(dev, "DMAing conflict in %s [DMAstat:%d][irqlock:%d]\n",
606*4882a593Smuzhiyun 			   __func__, ei_status.dmaing, ei_status.irqlock);
607*4882a593Smuzhiyun 		return;
608*4882a593Smuzhiyun 	}
609*4882a593Smuzhiyun 	ei_status.dmaing |= 0x01;
610*4882a593Smuzhiyun 	/* We should already be in page 0, but to be safe... */
611*4882a593Smuzhiyun 	outb(E8390_PAGE0+E8390_START+E8390_NODMA, nic_base + NE_CMD);
612*4882a593Smuzhiyun 
613*4882a593Smuzhiyun #ifdef NE8390_RW_BUGFIX
614*4882a593Smuzhiyun 	/* Handle the read-before-write bug the same way as the
615*4882a593Smuzhiyun 	 * Crynwr packet driver -- the NatSemi method doesn't work.
616*4882a593Smuzhiyun 	 * Actually this doesn't always work either, but if you have
617*4882a593Smuzhiyun 	 * problems with your NEx000 this is better than nothing!
618*4882a593Smuzhiyun 	 */
619*4882a593Smuzhiyun 	outb(0x42, nic_base + EN0_RCNTLO);
620*4882a593Smuzhiyun 	outb(0x00, nic_base + EN0_RCNTHI);
621*4882a593Smuzhiyun 	outb(0x42, nic_base + EN0_RSARLO);
622*4882a593Smuzhiyun 	outb(0x00, nic_base + EN0_RSARHI);
623*4882a593Smuzhiyun 	outb(E8390_RREAD+E8390_START, nic_base + NE_CMD);
624*4882a593Smuzhiyun #endif
625*4882a593Smuzhiyun 	outb(ENISR_RDC, nic_base + EN0_ISR);
626*4882a593Smuzhiyun 
627*4882a593Smuzhiyun 	/* Now the normal output. */
628*4882a593Smuzhiyun 	outb(count & 0xff, nic_base + EN0_RCNTLO);
629*4882a593Smuzhiyun 	outb(count >> 8,   nic_base + EN0_RCNTHI);
630*4882a593Smuzhiyun 	outb(0x00, nic_base + EN0_RSARLO);
631*4882a593Smuzhiyun 	outb(start_page, nic_base + EN0_RSARHI);
632*4882a593Smuzhiyun 	outb(E8390_RWRITE+E8390_START, nic_base + NE_CMD);
633*4882a593Smuzhiyun 	if (ei_status.ne2k_flags & ONLY_16BIT_IO) {
634*4882a593Smuzhiyun 		outsw(NE_BASE + NE_DATAPORT, buf, count >> 1);
635*4882a593Smuzhiyun 	} else {
636*4882a593Smuzhiyun 		outsl(NE_BASE + NE_DATAPORT, buf, count >> 2);
637*4882a593Smuzhiyun 		if (count & 3) {
638*4882a593Smuzhiyun 			buf += count & ~3;
639*4882a593Smuzhiyun 			if (count & 2) {
640*4882a593Smuzhiyun 				__le16 *b = (__le16 *)buf;
641*4882a593Smuzhiyun 
642*4882a593Smuzhiyun 				outw(le16_to_cpu(*b++), NE_BASE + NE_DATAPORT);
643*4882a593Smuzhiyun 				buf = (char *)b;
644*4882a593Smuzhiyun 			}
645*4882a593Smuzhiyun 		}
646*4882a593Smuzhiyun 	}
647*4882a593Smuzhiyun 
648*4882a593Smuzhiyun 	dma_start = jiffies;
649*4882a593Smuzhiyun 
650*4882a593Smuzhiyun 	while ((inb(nic_base + EN0_ISR) & ENISR_RDC) == 0)
651*4882a593Smuzhiyun 		/* Avoid clock roll-over. */
652*4882a593Smuzhiyun 		if (jiffies - dma_start > 2) {
653*4882a593Smuzhiyun 			netdev_warn(dev, "timeout waiting for Tx RDC.\n");
654*4882a593Smuzhiyun 			ne2k_pci_reset_8390(dev);
655*4882a593Smuzhiyun 			NS8390_init(dev, 1);
656*4882a593Smuzhiyun 			break;
657*4882a593Smuzhiyun 		}
658*4882a593Smuzhiyun 	/* Ack intr. */
659*4882a593Smuzhiyun 	outb(ENISR_RDC, nic_base + EN0_ISR);
660*4882a593Smuzhiyun 	ei_status.dmaing &= ~0x01;
661*4882a593Smuzhiyun }
662*4882a593Smuzhiyun 
ne2k_pci_get_drvinfo(struct net_device * dev,struct ethtool_drvinfo * info)663*4882a593Smuzhiyun static void ne2k_pci_get_drvinfo(struct net_device *dev,
664*4882a593Smuzhiyun 				 struct ethtool_drvinfo *info)
665*4882a593Smuzhiyun {
666*4882a593Smuzhiyun 	struct ei_device *ei = netdev_priv(dev);
667*4882a593Smuzhiyun 	struct pci_dev *pci_dev = (struct pci_dev *) ei->priv;
668*4882a593Smuzhiyun 
669*4882a593Smuzhiyun 	strscpy(info->driver, DRV_NAME, sizeof(info->driver));
670*4882a593Smuzhiyun 	strscpy(info->version, DRV_VERSION, sizeof(info->version));
671*4882a593Smuzhiyun 	strscpy(info->bus_info, pci_name(pci_dev), sizeof(info->bus_info));
672*4882a593Smuzhiyun }
673*4882a593Smuzhiyun 
ne2k_pci_get_msglevel(struct net_device * dev)674*4882a593Smuzhiyun static u32 ne2k_pci_get_msglevel(struct net_device *dev)
675*4882a593Smuzhiyun {
676*4882a593Smuzhiyun 	struct ei_device *ei_local = netdev_priv(dev);
677*4882a593Smuzhiyun 
678*4882a593Smuzhiyun 	return ei_local->msg_enable;
679*4882a593Smuzhiyun }
680*4882a593Smuzhiyun 
ne2k_pci_set_msglevel(struct net_device * dev,u32 v)681*4882a593Smuzhiyun static void ne2k_pci_set_msglevel(struct net_device *dev, u32 v)
682*4882a593Smuzhiyun {
683*4882a593Smuzhiyun 	struct ei_device *ei_local = netdev_priv(dev);
684*4882a593Smuzhiyun 
685*4882a593Smuzhiyun 	ei_local->msg_enable = v;
686*4882a593Smuzhiyun }
687*4882a593Smuzhiyun 
688*4882a593Smuzhiyun static const struct ethtool_ops ne2k_pci_ethtool_ops = {
689*4882a593Smuzhiyun 	.get_drvinfo		= ne2k_pci_get_drvinfo,
690*4882a593Smuzhiyun 	.get_msglevel		= ne2k_pci_get_msglevel,
691*4882a593Smuzhiyun 	.set_msglevel		= ne2k_pci_set_msglevel,
692*4882a593Smuzhiyun };
693*4882a593Smuzhiyun 
ne2k_pci_remove_one(struct pci_dev * pdev)694*4882a593Smuzhiyun static void ne2k_pci_remove_one(struct pci_dev *pdev)
695*4882a593Smuzhiyun {
696*4882a593Smuzhiyun 	struct net_device *dev = pci_get_drvdata(pdev);
697*4882a593Smuzhiyun 
698*4882a593Smuzhiyun 	BUG_ON(!dev);
699*4882a593Smuzhiyun 	unregister_netdev(dev);
700*4882a593Smuzhiyun 	release_region(dev->base_addr, NE_IO_EXTENT);
701*4882a593Smuzhiyun 	free_netdev(dev);
702*4882a593Smuzhiyun 	pci_disable_device(pdev);
703*4882a593Smuzhiyun }
704*4882a593Smuzhiyun 
ne2k_pci_suspend(struct device * dev_d)705*4882a593Smuzhiyun static int __maybe_unused ne2k_pci_suspend(struct device *dev_d)
706*4882a593Smuzhiyun {
707*4882a593Smuzhiyun 	struct net_device *dev = dev_get_drvdata(dev_d);
708*4882a593Smuzhiyun 
709*4882a593Smuzhiyun 	netif_device_detach(dev);
710*4882a593Smuzhiyun 
711*4882a593Smuzhiyun 	return 0;
712*4882a593Smuzhiyun }
713*4882a593Smuzhiyun 
ne2k_pci_resume(struct device * dev_d)714*4882a593Smuzhiyun static int __maybe_unused ne2k_pci_resume(struct device *dev_d)
715*4882a593Smuzhiyun {
716*4882a593Smuzhiyun 	struct net_device *dev = dev_get_drvdata(dev_d);
717*4882a593Smuzhiyun 
718*4882a593Smuzhiyun 	NS8390_init(dev, 1);
719*4882a593Smuzhiyun 	netif_device_attach(dev);
720*4882a593Smuzhiyun 
721*4882a593Smuzhiyun 	return 0;
722*4882a593Smuzhiyun }
723*4882a593Smuzhiyun 
724*4882a593Smuzhiyun static SIMPLE_DEV_PM_OPS(ne2k_pci_pm_ops, ne2k_pci_suspend, ne2k_pci_resume);
725*4882a593Smuzhiyun 
726*4882a593Smuzhiyun static struct pci_driver ne2k_driver = {
727*4882a593Smuzhiyun 	.name		= DRV_NAME,
728*4882a593Smuzhiyun 	.probe		= ne2k_pci_init_one,
729*4882a593Smuzhiyun 	.remove		= ne2k_pci_remove_one,
730*4882a593Smuzhiyun 	.id_table	= ne2k_pci_tbl,
731*4882a593Smuzhiyun 	.driver.pm	= &ne2k_pci_pm_ops,
732*4882a593Smuzhiyun };
733*4882a593Smuzhiyun 
734*4882a593Smuzhiyun 
ne2k_pci_init(void)735*4882a593Smuzhiyun static int __init ne2k_pci_init(void)
736*4882a593Smuzhiyun {
737*4882a593Smuzhiyun 	return pci_register_driver(&ne2k_driver);
738*4882a593Smuzhiyun }
739*4882a593Smuzhiyun 
740*4882a593Smuzhiyun 
ne2k_pci_cleanup(void)741*4882a593Smuzhiyun static void __exit ne2k_pci_cleanup(void)
742*4882a593Smuzhiyun {
743*4882a593Smuzhiyun 	pci_unregister_driver(&ne2k_driver);
744*4882a593Smuzhiyun }
745*4882a593Smuzhiyun 
746*4882a593Smuzhiyun module_init(ne2k_pci_init);
747*4882a593Smuzhiyun module_exit(ne2k_pci_cleanup);
748