1*4882a593Smuzhiyun /*
2*4882a593Smuzhiyun * Amiga Linux/m68k and Linux/PPC Zorro NS8390 Ethernet Driver
3*4882a593Smuzhiyun *
4*4882a593Smuzhiyun * (C) Copyright 1998-2000 by some Elitist 680x0 Users(TM)
5*4882a593Smuzhiyun *
6*4882a593Smuzhiyun * ---------------------------------------------------------------------------
7*4882a593Smuzhiyun *
8*4882a593Smuzhiyun * This program is based on all the other NE2000 drivers for Linux
9*4882a593Smuzhiyun *
10*4882a593Smuzhiyun * ---------------------------------------------------------------------------
11*4882a593Smuzhiyun *
12*4882a593Smuzhiyun * This file is subject to the terms and conditions of the GNU General Public
13*4882a593Smuzhiyun * License. See the file COPYING in the main directory of the Linux
14*4882a593Smuzhiyun * distribution for more details.
15*4882a593Smuzhiyun *
16*4882a593Smuzhiyun * ---------------------------------------------------------------------------
17*4882a593Smuzhiyun *
18*4882a593Smuzhiyun * The Ariadne II and X-Surf are Zorro-II boards containing Realtek RTL8019AS
19*4882a593Smuzhiyun * Ethernet Controllers.
20*4882a593Smuzhiyun */
21*4882a593Smuzhiyun
22*4882a593Smuzhiyun #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
23*4882a593Smuzhiyun
24*4882a593Smuzhiyun #include <linux/module.h>
25*4882a593Smuzhiyun #include <linux/kernel.h>
26*4882a593Smuzhiyun #include <linux/errno.h>
27*4882a593Smuzhiyun #include <linux/init.h>
28*4882a593Smuzhiyun #include <linux/delay.h>
29*4882a593Smuzhiyun #include <linux/netdevice.h>
30*4882a593Smuzhiyun #include <linux/etherdevice.h>
31*4882a593Smuzhiyun #include <linux/zorro.h>
32*4882a593Smuzhiyun #include <linux/jiffies.h>
33*4882a593Smuzhiyun
34*4882a593Smuzhiyun #include <asm/irq.h>
35*4882a593Smuzhiyun #include <asm/amigaints.h>
36*4882a593Smuzhiyun #include <asm/amigahw.h>
37*4882a593Smuzhiyun
38*4882a593Smuzhiyun #define EI_SHIFT(x) (ei_local->reg_offset[x])
39*4882a593Smuzhiyun #define ei_inb(port) in_8(port)
40*4882a593Smuzhiyun #define ei_outb(val, port) out_8(port, val)
41*4882a593Smuzhiyun #define ei_inb_p(port) in_8(port)
42*4882a593Smuzhiyun #define ei_outb_p(val, port) out_8(port, val)
43*4882a593Smuzhiyun
44*4882a593Smuzhiyun static const char version[] =
45*4882a593Smuzhiyun "8390.c:v1.10cvs 9/23/94 Donald Becker (becker@cesdis.gsfc.nasa.gov)\n";
46*4882a593Smuzhiyun
47*4882a593Smuzhiyun #include "lib8390.c"
48*4882a593Smuzhiyun
49*4882a593Smuzhiyun #define DRV_NAME "zorro8390"
50*4882a593Smuzhiyun
51*4882a593Smuzhiyun #define NE_BASE (dev->base_addr)
52*4882a593Smuzhiyun #define NE_CMD (0x00 * 2)
53*4882a593Smuzhiyun #define NE_DATAPORT (0x10 * 2) /* NatSemi-defined port window offset */
54*4882a593Smuzhiyun #define NE_RESET (0x1f * 2) /* Issue a read to reset,
55*4882a593Smuzhiyun * a write to clear. */
56*4882a593Smuzhiyun #define NE_IO_EXTENT (0x20 * 2)
57*4882a593Smuzhiyun
58*4882a593Smuzhiyun #define NE_EN0_ISR (0x07 * 2)
59*4882a593Smuzhiyun #define NE_EN0_DCFG (0x0e * 2)
60*4882a593Smuzhiyun
61*4882a593Smuzhiyun #define NE_EN0_RSARLO (0x08 * 2)
62*4882a593Smuzhiyun #define NE_EN0_RSARHI (0x09 * 2)
63*4882a593Smuzhiyun #define NE_EN0_RCNTLO (0x0a * 2)
64*4882a593Smuzhiyun #define NE_EN0_RXCR (0x0c * 2)
65*4882a593Smuzhiyun #define NE_EN0_TXCR (0x0d * 2)
66*4882a593Smuzhiyun #define NE_EN0_RCNTHI (0x0b * 2)
67*4882a593Smuzhiyun #define NE_EN0_IMR (0x0f * 2)
68*4882a593Smuzhiyun
69*4882a593Smuzhiyun #define NESM_START_PG 0x40 /* First page of TX buffer */
70*4882a593Smuzhiyun #define NESM_STOP_PG 0x80 /* Last page +1 of RX ring */
71*4882a593Smuzhiyun
72*4882a593Smuzhiyun #define WORDSWAP(a) ((((a) >> 8) & 0xff) | ((a) << 8))
73*4882a593Smuzhiyun
74*4882a593Smuzhiyun static struct card_info {
75*4882a593Smuzhiyun zorro_id id;
76*4882a593Smuzhiyun const char *name;
77*4882a593Smuzhiyun unsigned int offset;
78*4882a593Smuzhiyun } cards[] = {
79*4882a593Smuzhiyun { ZORRO_PROD_VILLAGE_TRONIC_ARIADNE2, "Ariadne II", 0x0600 },
80*4882a593Smuzhiyun { ZORRO_PROD_INDIVIDUAL_COMPUTERS_X_SURF, "X-Surf", 0x8600 },
81*4882a593Smuzhiyun };
82*4882a593Smuzhiyun
83*4882a593Smuzhiyun /* Hard reset the card. This used to pause for the same period that a
84*4882a593Smuzhiyun * 8390 reset command required, but that shouldn't be necessary.
85*4882a593Smuzhiyun */
zorro8390_reset_8390(struct net_device * dev)86*4882a593Smuzhiyun static void zorro8390_reset_8390(struct net_device *dev)
87*4882a593Smuzhiyun {
88*4882a593Smuzhiyun unsigned long reset_start_time = jiffies;
89*4882a593Smuzhiyun struct ei_device *ei_local = netdev_priv(dev);
90*4882a593Smuzhiyun
91*4882a593Smuzhiyun netif_dbg(ei_local, hw, dev, "resetting - t=%ld...\n", jiffies);
92*4882a593Smuzhiyun
93*4882a593Smuzhiyun z_writeb(z_readb(NE_BASE + NE_RESET), NE_BASE + NE_RESET);
94*4882a593Smuzhiyun
95*4882a593Smuzhiyun ei_status.txing = 0;
96*4882a593Smuzhiyun ei_status.dmaing = 0;
97*4882a593Smuzhiyun
98*4882a593Smuzhiyun /* This check _should_not_ be necessary, omit eventually. */
99*4882a593Smuzhiyun while ((z_readb(NE_BASE + NE_EN0_ISR) & ENISR_RESET) == 0)
100*4882a593Smuzhiyun if (time_after(jiffies, reset_start_time + 2 * HZ / 100)) {
101*4882a593Smuzhiyun netdev_warn(dev, "%s: did not complete\n", __func__);
102*4882a593Smuzhiyun break;
103*4882a593Smuzhiyun }
104*4882a593Smuzhiyun z_writeb(ENISR_RESET, NE_BASE + NE_EN0_ISR); /* Ack intr */
105*4882a593Smuzhiyun }
106*4882a593Smuzhiyun
107*4882a593Smuzhiyun /* Grab the 8390 specific header. Similar to the block_input routine, but
108*4882a593Smuzhiyun * we don't need to be concerned with ring wrap as the header will be at
109*4882a593Smuzhiyun * the start of a page, so we optimize accordingly.
110*4882a593Smuzhiyun */
zorro8390_get_8390_hdr(struct net_device * dev,struct e8390_pkt_hdr * hdr,int ring_page)111*4882a593Smuzhiyun static void zorro8390_get_8390_hdr(struct net_device *dev,
112*4882a593Smuzhiyun struct e8390_pkt_hdr *hdr, int ring_page)
113*4882a593Smuzhiyun {
114*4882a593Smuzhiyun int nic_base = dev->base_addr;
115*4882a593Smuzhiyun int cnt;
116*4882a593Smuzhiyun short *ptrs;
117*4882a593Smuzhiyun
118*4882a593Smuzhiyun /* This *shouldn't* happen.
119*4882a593Smuzhiyun * If it does, it's the last thing you'll see
120*4882a593Smuzhiyun */
121*4882a593Smuzhiyun if (ei_status.dmaing) {
122*4882a593Smuzhiyun netdev_warn(dev,
123*4882a593Smuzhiyun "%s: DMAing conflict [DMAstat:%d][irqlock:%d]\n",
124*4882a593Smuzhiyun __func__, ei_status.dmaing, ei_status.irqlock);
125*4882a593Smuzhiyun return;
126*4882a593Smuzhiyun }
127*4882a593Smuzhiyun
128*4882a593Smuzhiyun ei_status.dmaing |= 0x01;
129*4882a593Smuzhiyun z_writeb(E8390_NODMA + E8390_PAGE0 + E8390_START, nic_base + NE_CMD);
130*4882a593Smuzhiyun z_writeb(ENISR_RDC, nic_base + NE_EN0_ISR);
131*4882a593Smuzhiyun z_writeb(sizeof(struct e8390_pkt_hdr), nic_base + NE_EN0_RCNTLO);
132*4882a593Smuzhiyun z_writeb(0, nic_base + NE_EN0_RCNTHI);
133*4882a593Smuzhiyun z_writeb(0, nic_base + NE_EN0_RSARLO); /* On page boundary */
134*4882a593Smuzhiyun z_writeb(ring_page, nic_base + NE_EN0_RSARHI);
135*4882a593Smuzhiyun z_writeb(E8390_RREAD+E8390_START, nic_base + NE_CMD);
136*4882a593Smuzhiyun
137*4882a593Smuzhiyun ptrs = (short *)hdr;
138*4882a593Smuzhiyun for (cnt = 0; cnt < sizeof(struct e8390_pkt_hdr) >> 1; cnt++)
139*4882a593Smuzhiyun *ptrs++ = z_readw(NE_BASE + NE_DATAPORT);
140*4882a593Smuzhiyun
141*4882a593Smuzhiyun z_writeb(ENISR_RDC, nic_base + NE_EN0_ISR); /* Ack intr */
142*4882a593Smuzhiyun
143*4882a593Smuzhiyun hdr->count = WORDSWAP(hdr->count);
144*4882a593Smuzhiyun
145*4882a593Smuzhiyun ei_status.dmaing &= ~0x01;
146*4882a593Smuzhiyun }
147*4882a593Smuzhiyun
148*4882a593Smuzhiyun /* Block input and output, similar to the Crynwr packet driver.
149*4882a593Smuzhiyun * If you are porting to a new ethercard, look at the packet driver source
150*4882a593Smuzhiyun * for hints. The NEx000 doesn't share the on-board packet memory --
151*4882a593Smuzhiyun * you have to put the packet out through the "remote DMA" dataport
152*4882a593Smuzhiyun * using z_writeb.
153*4882a593Smuzhiyun */
zorro8390_block_input(struct net_device * dev,int count,struct sk_buff * skb,int ring_offset)154*4882a593Smuzhiyun static void zorro8390_block_input(struct net_device *dev, int count,
155*4882a593Smuzhiyun struct sk_buff *skb, int ring_offset)
156*4882a593Smuzhiyun {
157*4882a593Smuzhiyun int nic_base = dev->base_addr;
158*4882a593Smuzhiyun char *buf = skb->data;
159*4882a593Smuzhiyun short *ptrs;
160*4882a593Smuzhiyun int cnt;
161*4882a593Smuzhiyun
162*4882a593Smuzhiyun /* This *shouldn't* happen.
163*4882a593Smuzhiyun * If it does, it's the last thing you'll see
164*4882a593Smuzhiyun */
165*4882a593Smuzhiyun if (ei_status.dmaing) {
166*4882a593Smuzhiyun netdev_err(dev, "%s: DMAing conflict [DMAstat:%d][irqlock:%d]\n",
167*4882a593Smuzhiyun __func__, ei_status.dmaing, ei_status.irqlock);
168*4882a593Smuzhiyun return;
169*4882a593Smuzhiyun }
170*4882a593Smuzhiyun ei_status.dmaing |= 0x01;
171*4882a593Smuzhiyun z_writeb(E8390_NODMA + E8390_PAGE0 + E8390_START, nic_base + NE_CMD);
172*4882a593Smuzhiyun z_writeb(ENISR_RDC, nic_base + NE_EN0_ISR);
173*4882a593Smuzhiyun z_writeb(count & 0xff, nic_base + NE_EN0_RCNTLO);
174*4882a593Smuzhiyun z_writeb(count >> 8, nic_base + NE_EN0_RCNTHI);
175*4882a593Smuzhiyun z_writeb(ring_offset & 0xff, nic_base + NE_EN0_RSARLO);
176*4882a593Smuzhiyun z_writeb(ring_offset >> 8, nic_base + NE_EN0_RSARHI);
177*4882a593Smuzhiyun z_writeb(E8390_RREAD+E8390_START, nic_base + NE_CMD);
178*4882a593Smuzhiyun ptrs = (short *)buf;
179*4882a593Smuzhiyun for (cnt = 0; cnt < count >> 1; cnt++)
180*4882a593Smuzhiyun *ptrs++ = z_readw(NE_BASE + NE_DATAPORT);
181*4882a593Smuzhiyun if (count & 0x01)
182*4882a593Smuzhiyun buf[count - 1] = z_readb(NE_BASE + NE_DATAPORT);
183*4882a593Smuzhiyun
184*4882a593Smuzhiyun z_writeb(ENISR_RDC, nic_base + NE_EN0_ISR); /* Ack intr */
185*4882a593Smuzhiyun ei_status.dmaing &= ~0x01;
186*4882a593Smuzhiyun }
187*4882a593Smuzhiyun
zorro8390_block_output(struct net_device * dev,int count,const unsigned char * buf,const int start_page)188*4882a593Smuzhiyun static void zorro8390_block_output(struct net_device *dev, int count,
189*4882a593Smuzhiyun const unsigned char *buf,
190*4882a593Smuzhiyun const int start_page)
191*4882a593Smuzhiyun {
192*4882a593Smuzhiyun int nic_base = NE_BASE;
193*4882a593Smuzhiyun unsigned long dma_start;
194*4882a593Smuzhiyun short *ptrs;
195*4882a593Smuzhiyun int cnt;
196*4882a593Smuzhiyun
197*4882a593Smuzhiyun /* Round the count up for word writes. Do we need to do this?
198*4882a593Smuzhiyun * What effect will an odd byte count have on the 8390?
199*4882a593Smuzhiyun * I should check someday.
200*4882a593Smuzhiyun */
201*4882a593Smuzhiyun if (count & 0x01)
202*4882a593Smuzhiyun count++;
203*4882a593Smuzhiyun
204*4882a593Smuzhiyun /* This *shouldn't* happen.
205*4882a593Smuzhiyun * If it does, it's the last thing you'll see
206*4882a593Smuzhiyun */
207*4882a593Smuzhiyun if (ei_status.dmaing) {
208*4882a593Smuzhiyun netdev_err(dev, "%s: DMAing conflict [DMAstat:%d][irqlock:%d]\n",
209*4882a593Smuzhiyun __func__, ei_status.dmaing, ei_status.irqlock);
210*4882a593Smuzhiyun return;
211*4882a593Smuzhiyun }
212*4882a593Smuzhiyun ei_status.dmaing |= 0x01;
213*4882a593Smuzhiyun /* We should already be in page 0, but to be safe... */
214*4882a593Smuzhiyun z_writeb(E8390_PAGE0+E8390_START+E8390_NODMA, nic_base + NE_CMD);
215*4882a593Smuzhiyun
216*4882a593Smuzhiyun z_writeb(ENISR_RDC, nic_base + NE_EN0_ISR);
217*4882a593Smuzhiyun
218*4882a593Smuzhiyun /* Now the normal output. */
219*4882a593Smuzhiyun z_writeb(count & 0xff, nic_base + NE_EN0_RCNTLO);
220*4882a593Smuzhiyun z_writeb(count >> 8, nic_base + NE_EN0_RCNTHI);
221*4882a593Smuzhiyun z_writeb(0x00, nic_base + NE_EN0_RSARLO);
222*4882a593Smuzhiyun z_writeb(start_page, nic_base + NE_EN0_RSARHI);
223*4882a593Smuzhiyun
224*4882a593Smuzhiyun z_writeb(E8390_RWRITE + E8390_START, nic_base + NE_CMD);
225*4882a593Smuzhiyun ptrs = (short *)buf;
226*4882a593Smuzhiyun for (cnt = 0; cnt < count >> 1; cnt++)
227*4882a593Smuzhiyun z_writew(*ptrs++, NE_BASE + NE_DATAPORT);
228*4882a593Smuzhiyun
229*4882a593Smuzhiyun dma_start = jiffies;
230*4882a593Smuzhiyun
231*4882a593Smuzhiyun while ((z_readb(NE_BASE + NE_EN0_ISR) & ENISR_RDC) == 0)
232*4882a593Smuzhiyun if (time_after(jiffies, dma_start + 2 * HZ / 100)) {
233*4882a593Smuzhiyun /* 20ms */
234*4882a593Smuzhiyun netdev_warn(dev, "timeout waiting for Tx RDC\n");
235*4882a593Smuzhiyun zorro8390_reset_8390(dev);
236*4882a593Smuzhiyun __NS8390_init(dev, 1);
237*4882a593Smuzhiyun break;
238*4882a593Smuzhiyun }
239*4882a593Smuzhiyun
240*4882a593Smuzhiyun z_writeb(ENISR_RDC, nic_base + NE_EN0_ISR); /* Ack intr */
241*4882a593Smuzhiyun ei_status.dmaing &= ~0x01;
242*4882a593Smuzhiyun }
243*4882a593Smuzhiyun
zorro8390_open(struct net_device * dev)244*4882a593Smuzhiyun static int zorro8390_open(struct net_device *dev)
245*4882a593Smuzhiyun {
246*4882a593Smuzhiyun __ei_open(dev);
247*4882a593Smuzhiyun return 0;
248*4882a593Smuzhiyun }
249*4882a593Smuzhiyun
zorro8390_close(struct net_device * dev)250*4882a593Smuzhiyun static int zorro8390_close(struct net_device *dev)
251*4882a593Smuzhiyun {
252*4882a593Smuzhiyun struct ei_device *ei_local = netdev_priv(dev);
253*4882a593Smuzhiyun
254*4882a593Smuzhiyun netif_dbg(ei_local, ifdown, dev, "Shutting down ethercard\n");
255*4882a593Smuzhiyun __ei_close(dev);
256*4882a593Smuzhiyun return 0;
257*4882a593Smuzhiyun }
258*4882a593Smuzhiyun
zorro8390_remove_one(struct zorro_dev * z)259*4882a593Smuzhiyun static void zorro8390_remove_one(struct zorro_dev *z)
260*4882a593Smuzhiyun {
261*4882a593Smuzhiyun struct net_device *dev = zorro_get_drvdata(z);
262*4882a593Smuzhiyun
263*4882a593Smuzhiyun unregister_netdev(dev);
264*4882a593Smuzhiyun free_irq(IRQ_AMIGA_PORTS, dev);
265*4882a593Smuzhiyun release_mem_region(ZTWO_PADDR(dev->base_addr), NE_IO_EXTENT * 2);
266*4882a593Smuzhiyun free_netdev(dev);
267*4882a593Smuzhiyun }
268*4882a593Smuzhiyun
269*4882a593Smuzhiyun static struct zorro_device_id zorro8390_zorro_tbl[] = {
270*4882a593Smuzhiyun { ZORRO_PROD_VILLAGE_TRONIC_ARIADNE2, },
271*4882a593Smuzhiyun { ZORRO_PROD_INDIVIDUAL_COMPUTERS_X_SURF, },
272*4882a593Smuzhiyun { 0 }
273*4882a593Smuzhiyun };
274*4882a593Smuzhiyun MODULE_DEVICE_TABLE(zorro, zorro8390_zorro_tbl);
275*4882a593Smuzhiyun
276*4882a593Smuzhiyun static const struct net_device_ops zorro8390_netdev_ops = {
277*4882a593Smuzhiyun .ndo_open = zorro8390_open,
278*4882a593Smuzhiyun .ndo_stop = zorro8390_close,
279*4882a593Smuzhiyun .ndo_start_xmit = __ei_start_xmit,
280*4882a593Smuzhiyun .ndo_tx_timeout = __ei_tx_timeout,
281*4882a593Smuzhiyun .ndo_get_stats = __ei_get_stats,
282*4882a593Smuzhiyun .ndo_set_rx_mode = __ei_set_multicast_list,
283*4882a593Smuzhiyun .ndo_validate_addr = eth_validate_addr,
284*4882a593Smuzhiyun .ndo_set_mac_address = eth_mac_addr,
285*4882a593Smuzhiyun #ifdef CONFIG_NET_POLL_CONTROLLER
286*4882a593Smuzhiyun .ndo_poll_controller = __ei_poll,
287*4882a593Smuzhiyun #endif
288*4882a593Smuzhiyun };
289*4882a593Smuzhiyun
zorro8390_init(struct net_device * dev,unsigned long board,const char * name,void __iomem * ioaddr)290*4882a593Smuzhiyun static int zorro8390_init(struct net_device *dev, unsigned long board,
291*4882a593Smuzhiyun const char *name, void __iomem *ioaddr)
292*4882a593Smuzhiyun {
293*4882a593Smuzhiyun int i;
294*4882a593Smuzhiyun int err;
295*4882a593Smuzhiyun unsigned char SA_prom[32];
296*4882a593Smuzhiyun int start_page, stop_page;
297*4882a593Smuzhiyun static u32 zorro8390_offsets[16] = {
298*4882a593Smuzhiyun 0x00, 0x02, 0x04, 0x06, 0x08, 0x0a, 0x0c, 0x0e,
299*4882a593Smuzhiyun 0x10, 0x12, 0x14, 0x16, 0x18, 0x1a, 0x1c, 0x1e,
300*4882a593Smuzhiyun };
301*4882a593Smuzhiyun
302*4882a593Smuzhiyun /* Reset card. Who knows what dain-bramaged state it was left in. */
303*4882a593Smuzhiyun {
304*4882a593Smuzhiyun unsigned long reset_start_time = jiffies;
305*4882a593Smuzhiyun
306*4882a593Smuzhiyun z_writeb(z_readb(ioaddr + NE_RESET), ioaddr + NE_RESET);
307*4882a593Smuzhiyun
308*4882a593Smuzhiyun while ((z_readb(ioaddr + NE_EN0_ISR) & ENISR_RESET) == 0)
309*4882a593Smuzhiyun if (time_after(jiffies,
310*4882a593Smuzhiyun reset_start_time + 2 * HZ / 100)) {
311*4882a593Smuzhiyun netdev_warn(dev, "not found (no reset ack)\n");
312*4882a593Smuzhiyun return -ENODEV;
313*4882a593Smuzhiyun }
314*4882a593Smuzhiyun
315*4882a593Smuzhiyun z_writeb(0xff, ioaddr + NE_EN0_ISR); /* Ack all intr. */
316*4882a593Smuzhiyun }
317*4882a593Smuzhiyun
318*4882a593Smuzhiyun /* Read the 16 bytes of station address PROM.
319*4882a593Smuzhiyun * We must first initialize registers,
320*4882a593Smuzhiyun * similar to NS8390_init(eifdev, 0).
321*4882a593Smuzhiyun * We can't reliably read the SAPROM address without this.
322*4882a593Smuzhiyun * (I learned the hard way!).
323*4882a593Smuzhiyun */
324*4882a593Smuzhiyun {
325*4882a593Smuzhiyun static const struct {
326*4882a593Smuzhiyun u32 value;
327*4882a593Smuzhiyun u32 offset;
328*4882a593Smuzhiyun } program_seq[] = {
329*4882a593Smuzhiyun {E8390_NODMA + E8390_PAGE0 + E8390_STOP, NE_CMD},
330*4882a593Smuzhiyun /* Select page 0 */
331*4882a593Smuzhiyun {0x48, NE_EN0_DCFG}, /* 0x48: Set byte-wide access */
332*4882a593Smuzhiyun {0x00, NE_EN0_RCNTLO}, /* Clear the count regs */
333*4882a593Smuzhiyun {0x00, NE_EN0_RCNTHI},
334*4882a593Smuzhiyun {0x00, NE_EN0_IMR}, /* Mask completion irq */
335*4882a593Smuzhiyun {0xFF, NE_EN0_ISR},
336*4882a593Smuzhiyun {E8390_RXOFF, NE_EN0_RXCR}, /* 0x20 Set to monitor */
337*4882a593Smuzhiyun {E8390_TXOFF, NE_EN0_TXCR}, /* 0x02 and loopback mode */
338*4882a593Smuzhiyun {32, NE_EN0_RCNTLO},
339*4882a593Smuzhiyun {0x00, NE_EN0_RCNTHI},
340*4882a593Smuzhiyun {0x00, NE_EN0_RSARLO}, /* DMA starting at 0x0000 */
341*4882a593Smuzhiyun {0x00, NE_EN0_RSARHI},
342*4882a593Smuzhiyun {E8390_RREAD + E8390_START, NE_CMD},
343*4882a593Smuzhiyun };
344*4882a593Smuzhiyun for (i = 0; i < ARRAY_SIZE(program_seq); i++)
345*4882a593Smuzhiyun z_writeb(program_seq[i].value,
346*4882a593Smuzhiyun ioaddr + program_seq[i].offset);
347*4882a593Smuzhiyun }
348*4882a593Smuzhiyun for (i = 0; i < 16; i++) {
349*4882a593Smuzhiyun SA_prom[i] = z_readb(ioaddr + NE_DATAPORT);
350*4882a593Smuzhiyun (void)z_readb(ioaddr + NE_DATAPORT);
351*4882a593Smuzhiyun }
352*4882a593Smuzhiyun
353*4882a593Smuzhiyun /* We must set the 8390 for word mode. */
354*4882a593Smuzhiyun z_writeb(0x49, ioaddr + NE_EN0_DCFG);
355*4882a593Smuzhiyun start_page = NESM_START_PG;
356*4882a593Smuzhiyun stop_page = NESM_STOP_PG;
357*4882a593Smuzhiyun
358*4882a593Smuzhiyun dev->base_addr = (unsigned long)ioaddr;
359*4882a593Smuzhiyun dev->irq = IRQ_AMIGA_PORTS;
360*4882a593Smuzhiyun
361*4882a593Smuzhiyun /* Install the Interrupt handler */
362*4882a593Smuzhiyun i = request_irq(IRQ_AMIGA_PORTS, __ei_interrupt,
363*4882a593Smuzhiyun IRQF_SHARED, DRV_NAME, dev);
364*4882a593Smuzhiyun if (i)
365*4882a593Smuzhiyun return i;
366*4882a593Smuzhiyun
367*4882a593Smuzhiyun for (i = 0; i < ETH_ALEN; i++)
368*4882a593Smuzhiyun dev->dev_addr[i] = SA_prom[i];
369*4882a593Smuzhiyun
370*4882a593Smuzhiyun pr_debug("Found ethernet address: %pM\n", dev->dev_addr);
371*4882a593Smuzhiyun
372*4882a593Smuzhiyun ei_status.name = name;
373*4882a593Smuzhiyun ei_status.tx_start_page = start_page;
374*4882a593Smuzhiyun ei_status.stop_page = stop_page;
375*4882a593Smuzhiyun ei_status.word16 = 1;
376*4882a593Smuzhiyun
377*4882a593Smuzhiyun ei_status.rx_start_page = start_page + TX_PAGES;
378*4882a593Smuzhiyun
379*4882a593Smuzhiyun ei_status.reset_8390 = zorro8390_reset_8390;
380*4882a593Smuzhiyun ei_status.block_input = zorro8390_block_input;
381*4882a593Smuzhiyun ei_status.block_output = zorro8390_block_output;
382*4882a593Smuzhiyun ei_status.get_8390_hdr = zorro8390_get_8390_hdr;
383*4882a593Smuzhiyun ei_status.reg_offset = zorro8390_offsets;
384*4882a593Smuzhiyun
385*4882a593Smuzhiyun dev->netdev_ops = &zorro8390_netdev_ops;
386*4882a593Smuzhiyun __NS8390_init(dev, 0);
387*4882a593Smuzhiyun
388*4882a593Smuzhiyun err = register_netdev(dev);
389*4882a593Smuzhiyun if (err) {
390*4882a593Smuzhiyun free_irq(IRQ_AMIGA_PORTS, dev);
391*4882a593Smuzhiyun return err;
392*4882a593Smuzhiyun }
393*4882a593Smuzhiyun
394*4882a593Smuzhiyun netdev_info(dev, "%s at 0x%08lx, Ethernet Address %pM\n",
395*4882a593Smuzhiyun name, board, dev->dev_addr);
396*4882a593Smuzhiyun
397*4882a593Smuzhiyun return 0;
398*4882a593Smuzhiyun }
399*4882a593Smuzhiyun
zorro8390_init_one(struct zorro_dev * z,const struct zorro_device_id * ent)400*4882a593Smuzhiyun static int zorro8390_init_one(struct zorro_dev *z,
401*4882a593Smuzhiyun const struct zorro_device_id *ent)
402*4882a593Smuzhiyun {
403*4882a593Smuzhiyun struct net_device *dev;
404*4882a593Smuzhiyun unsigned long board, ioaddr;
405*4882a593Smuzhiyun int err, i;
406*4882a593Smuzhiyun
407*4882a593Smuzhiyun for (i = ARRAY_SIZE(cards) - 1; i >= 0; i--)
408*4882a593Smuzhiyun if (z->id == cards[i].id)
409*4882a593Smuzhiyun break;
410*4882a593Smuzhiyun if (i < 0)
411*4882a593Smuzhiyun return -ENODEV;
412*4882a593Smuzhiyun
413*4882a593Smuzhiyun board = z->resource.start;
414*4882a593Smuzhiyun ioaddr = board + cards[i].offset;
415*4882a593Smuzhiyun dev = ____alloc_ei_netdev(0);
416*4882a593Smuzhiyun if (!dev)
417*4882a593Smuzhiyun return -ENOMEM;
418*4882a593Smuzhiyun if (!request_mem_region(ioaddr, NE_IO_EXTENT * 2, DRV_NAME)) {
419*4882a593Smuzhiyun free_netdev(dev);
420*4882a593Smuzhiyun return -EBUSY;
421*4882a593Smuzhiyun }
422*4882a593Smuzhiyun err = zorro8390_init(dev, board, cards[i].name, ZTWO_VADDR(ioaddr));
423*4882a593Smuzhiyun if (err) {
424*4882a593Smuzhiyun release_mem_region(ioaddr, NE_IO_EXTENT * 2);
425*4882a593Smuzhiyun free_netdev(dev);
426*4882a593Smuzhiyun return err;
427*4882a593Smuzhiyun }
428*4882a593Smuzhiyun zorro_set_drvdata(z, dev);
429*4882a593Smuzhiyun return 0;
430*4882a593Smuzhiyun }
431*4882a593Smuzhiyun
432*4882a593Smuzhiyun static struct zorro_driver zorro8390_driver = {
433*4882a593Smuzhiyun .name = "zorro8390",
434*4882a593Smuzhiyun .id_table = zorro8390_zorro_tbl,
435*4882a593Smuzhiyun .probe = zorro8390_init_one,
436*4882a593Smuzhiyun .remove = zorro8390_remove_one,
437*4882a593Smuzhiyun };
438*4882a593Smuzhiyun
zorro8390_init_module(void)439*4882a593Smuzhiyun static int __init zorro8390_init_module(void)
440*4882a593Smuzhiyun {
441*4882a593Smuzhiyun return zorro_register_driver(&zorro8390_driver);
442*4882a593Smuzhiyun }
443*4882a593Smuzhiyun
zorro8390_cleanup_module(void)444*4882a593Smuzhiyun static void __exit zorro8390_cleanup_module(void)
445*4882a593Smuzhiyun {
446*4882a593Smuzhiyun zorro_unregister_driver(&zorro8390_driver);
447*4882a593Smuzhiyun }
448*4882a593Smuzhiyun
449*4882a593Smuzhiyun module_init(zorro8390_init_module);
450*4882a593Smuzhiyun module_exit(zorro8390_cleanup_module);
451*4882a593Smuzhiyun
452*4882a593Smuzhiyun MODULE_LICENSE("GPL");
453