Home
last modified time | relevance | path

Searched refs:ENABLE_L2_PDE0_CACHE_LRU_UPDATE_BY_WRITE (Results 1 – 9 of 9) sorted by relevance

/OK3568_Linux_fs/kernel/drivers/gpu/drm/radeon/
H A Dnid.h108 #define ENABLE_L2_PDE0_CACHE_LRU_UPDATE_BY_WRITE (1 << 10) macro
H A Dni.c1297 ENABLE_L2_PDE0_CACHE_LRU_UPDATE_BY_WRITE | in cayman_pcie_gart_enable()
1376 ENABLE_L2_PDE0_CACHE_LRU_UPDATE_BY_WRITE | in cayman_pcie_gart_disable()
H A Dsid.h375 #define ENABLE_L2_PDE0_CACHE_LRU_UPDATE_BY_WRITE (1 << 10) macro
H A Dcikd.h493 #define ENABLE_L2_PDE0_CACHE_LRU_UPDATE_BY_WRITE (1 << 10) macro
H A Dsi.c4308 ENABLE_L2_PDE0_CACHE_LRU_UPDATE_BY_WRITE | in si_pcie_gart_enable()
4394 ENABLE_L2_PDE0_CACHE_LRU_UPDATE_BY_WRITE | in si_pcie_gart_disable()
H A Dcik.c5452 ENABLE_L2_PDE0_CACHE_LRU_UPDATE_BY_WRITE | in cik_pcie_gart_enable()
5569 ENABLE_L2_PDE0_CACHE_LRU_UPDATE_BY_WRITE | in cik_pcie_gart_disable()
/OK3568_Linux_fs/kernel/drivers/gpu/drm/amd/amdgpu/
H A Dgmc_v7_0.c637 tmp = REG_SET_FIELD(tmp, VM_L2_CNTL, ENABLE_L2_PDE0_CACHE_LRU_UPDATE_BY_WRITE, 1); in gmc_v7_0_gart_enable()
H A Dgmc_v8_0.c870 tmp = REG_SET_FIELD(tmp, VM_L2_CNTL, ENABLE_L2_PDE0_CACHE_LRU_UPDATE_BY_WRITE, 1); in gmc_v8_0_gart_enable()
H A Dsid.h376 #define ENABLE_L2_PDE0_CACHE_LRU_UPDATE_BY_WRITE (1 << 10) macro