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Searched refs:CONFIG_SYS_DDR_TIMING_3_800 (Results 1 – 10 of 10) sorted by relevance

/OK3568_Linux_fs/u-boot/board/freescale/corenet_ds/
H A Dp4080ds_ddr.c37 #define CONFIG_SYS_DDR_TIMING_3_800 0x00020000 macro
88 .timing_cfg_3 = CONFIG_SYS_DDR_TIMING_3_800,
120 .timing_cfg_3 = CONFIG_SYS_DDR_TIMING_3_800,
/OK3568_Linux_fs/u-boot/board/freescale/bsc9131rdb/
H A Dspl_minimal.c32 __raw_writel(CONFIG_SYS_DDR_TIMING_3_800, &ddr->timing_cfg_3); in sdram_init()
H A Dddr.c25 .timing_cfg_3 = CONFIG_SYS_DDR_TIMING_3_800,
/OK3568_Linux_fs/u-boot/board/freescale/bsc9132qds/
H A Dspl_minimal.c29 __raw_writel(CONFIG_SYS_DDR_TIMING_3_800, &ddr->timing_cfg_3); in sdram_init()
H A Dddr.c24 .timing_cfg_3 = CONFIG_SYS_DDR_TIMING_3_800,
/OK3568_Linux_fs/u-boot/include/configs/
H A DBSC9131RDB.h106 #define CONFIG_SYS_DDR_TIMING_3_800 0x00030000 macro
H A DBSC9132QDS.h161 #define CONFIG_SYS_DDR_TIMING_3_800 0x00020000 macro
H A DP1010RDB.h255 #define CONFIG_SYS_DDR_TIMING_3_800 0x00030000 macro
/OK3568_Linux_fs/u-boot/board/freescale/p1010rdb/
H A Dddr.c25 .timing_cfg_3 = CONFIG_SYS_DDR_TIMING_3_800,
/OK3568_Linux_fs/u-boot/scripts/
H A Dconfig_whitelist.txt2763 CONFIG_SYS_DDR_TIMING_3_800