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Searched refs:CONFIG_SYS_DDR_TIMING_1_800 (Results 1 – 10 of 10) sorted by relevance

/OK3568_Linux_fs/u-boot/board/freescale/corenet_ds/
H A Dp4080ds_ddr.c39 #define CONFIG_SYS_DDR_TIMING_1_800 0x6f6b4744 macro
90 .timing_cfg_1 = CONFIG_SYS_DDR_TIMING_1_800,
122 .timing_cfg_1 = CONFIG_SYS_DDR_TIMING_1_800,
/OK3568_Linux_fs/u-boot/board/freescale/bsc9131rdb/
H A Dspl_minimal.c34 __raw_writel(CONFIG_SYS_DDR_TIMING_1_800, &ddr->timing_cfg_1); in sdram_init()
H A Dddr.c27 .timing_cfg_1 = CONFIG_SYS_DDR_TIMING_1_800,
/OK3568_Linux_fs/u-boot/board/freescale/bsc9132qds/
H A Dspl_minimal.c31 __raw_writel(CONFIG_SYS_DDR_TIMING_1_800, &ddr->timing_cfg_1); in sdram_init()
H A Dddr.c26 .timing_cfg_1 = CONFIG_SYS_DDR_TIMING_1_800,
/OK3568_Linux_fs/u-boot/include/configs/
H A DBSC9131RDB.h108 #define CONFIG_SYS_DDR_TIMING_1_800 0x6f6b8644 macro
H A DBSC9132QDS.h163 #define CONFIG_SYS_DDR_TIMING_1_800 0x6f6B4846 macro
H A DP1010RDB.h257 #define CONFIG_SYS_DDR_TIMING_1_800 0x6f6b8644 macro
/OK3568_Linux_fs/u-boot/board/freescale/p1010rdb/
H A Dddr.c27 .timing_cfg_1 = CONFIG_SYS_DDR_TIMING_1_800,
/OK3568_Linux_fs/u-boot/scripts/
H A Dconfig_whitelist.txt2749 CONFIG_SYS_DDR_TIMING_1_800