Searched refs:CLK_GATE_OPEN (Results 1 – 8 of 8) sorted by relevance
59 CLK_GATE_OPEN << (APB2_GATE_TWI_SHIFT + port)); in clock_twi_onoff()66 CLK_GATE_OPEN << (APB2_GATE_TWI_SHIFT + port)); in clock_twi_onoff()
77 CLK_GATE_OPEN << (APB1_GATE_UART_SHIFT + in clock_init_uart()186 CLK_GATE_OPEN << (APB1_GATE_TWI_SHIFT + port)); in clock_twi_onoff()193 CLK_GATE_OPEN << (APB1_GATE_TWI_SHIFT + port)); in clock_twi_onoff()
62 CLK_GATE_OPEN << (APB1_GATE_UART_SHIFT+CONFIG_CONS_INDEX - 1)); in clock_init_uart()73 CLK_GATE_OPEN << (APB1_GATE_TWI_SHIFT + port)); in clock_twi_onoff()76 CLK_GATE_OPEN << (APB1_GATE_TWI_SHIFT + port)); in clock_twi_onoff()
65 CLK_GATE_OPEN << (APB2_GATE_UART_SHIFT + in clock_init_uart()
97 CLK_GATE_OPEN << (APB2_GATE_UART_SHIFT + in clock_init_uart()
14 #define CLK_GATE_OPEN 0x1 macro
542 clrbits_le32(&ccm->ahb_gate0, (CLK_GATE_OPEN << AHB_GATE_OFFSET_NAND0)); in nand_deselect()
269 setbits_le32(&ccm->ahb_gate0, (CLK_GATE_OPEN << AHB_GATE_OFFSET_NAND0)); in nand_clock_setup()