Searched refs:AMD_CG_SUPPORT_HDP_MGCG (Results 1 – 8 of 8) sorted by relevance
1143 AMD_CG_SUPPORT_HDP_MGCG | in vi_common_early_init()1159 AMD_CG_SUPPORT_HDP_MGCG | in vi_common_early_init()1181 AMD_CG_SUPPORT_HDP_MGCG | in vi_common_early_init()1204 AMD_CG_SUPPORT_HDP_MGCG | in vi_common_early_init()1227 AMD_CG_SUPPORT_HDP_MGCG | in vi_common_early_init()1273 AMD_CG_SUPPORT_HDP_MGCG | in vi_common_early_init()1299 AMD_CG_SUPPORT_HDP_MGCG | in vi_common_early_init()1435 if (enable && (adev->cg_flags & AMD_CG_SUPPORT_HDP_MGCG)) in vi_update_hdp_medium_grain_clock_gating()1538 if (adev->cg_flags & (AMD_CG_SUPPORT_HDP_LS | AMD_CG_SUPPORT_HDP_MGCG)) { in vi_common_set_clockgating_state_by_smu()1543 if (adev->cg_flags & AMD_CG_SUPPORT_HDP_MGCG) { in vi_common_set_clockgating_state_by_smu()[all …]
728 AMD_CG_SUPPORT_HDP_MGCG | in nv_common_early_init()750 AMD_CG_SUPPORT_HDP_MGCG | in nv_common_early_init()774 AMD_CG_SUPPORT_HDP_MGCG | in nv_common_early_init()803 AMD_CG_SUPPORT_HDP_MGCG | in nv_common_early_init()827 AMD_CG_SUPPORT_HDP_MGCG | in nv_common_early_init()1025 if (!(adev->cg_flags & AMD_CG_SUPPORT_HDP_MGCG)) in nv_update_hdp_clock_gating()1105 *flags |= AMD_CG_SUPPORT_HDP_MGCG; in nv_common_get_clockgating_state()
1115 AMD_CG_SUPPORT_HDP_MGCG | in soc15_common_early_init()1138 AMD_CG_SUPPORT_HDP_MGCG | in soc15_common_early_init()1213 AMD_CG_SUPPORT_HDP_MGCG | in soc15_common_early_init()1234 AMD_CG_SUPPORT_HDP_MGCG | in soc15_common_early_init()
1988 AMD_CG_SUPPORT_HDP_MGCG; in cik_common_early_init()2008 AMD_CG_SUPPORT_HDP_MGCG; in cik_common_early_init()2027 AMD_CG_SUPPORT_HDP_MGCG; in cik_common_early_init()2063 AMD_CG_SUPPORT_HDP_MGCG; in cik_common_early_init()
1942 AMD_CG_SUPPORT_HDP_MGCG; in si_common_early_init()1963 AMD_CG_SUPPORT_HDP_MGCG; in si_common_early_init()1984 AMD_CG_SUPPORT_HDP_MGCG; in si_common_early_init()2004 AMD_CG_SUPPORT_HDP_MGCG; in si_common_early_init()2022 AMD_CG_SUPPORT_HDP_MGCG; in si_common_early_init()
890 if (enable && (adev->cg_flags & AMD_CG_SUPPORT_HDP_MGCG)) in gmc_v7_0_enable_hdp_mgcg()
131 #define AMD_CG_SUPPORT_HDP_MGCG (1 << 16) macro
61 {AMD_CG_SUPPORT_HDP_MGCG, "Host Data Path Medium Grain Clock Gating"},