Searched hist:dd884cc27faa922a35501c4f1f98d5ab0b217a4a (Results 1 – 2 of 2) sorted by relevance
| /optee_os/core/arch/arm/plat-stm32mp1/ |
| H A D | platform_config.h | dd884cc27faa922a35501c4f1f98d5ab0b217a4a Mon Mar 06 13:54:53 UTC 2023 Etienne Carriere <etienne.carriere@linaro.org> plat-stm32mp1: conf: support 32bit MMU
Updates CFG_TEE_RAM_VA_SIZE default value and MAX_XLAT_TABLES when
32bit-MMU mapping is used instead of LPAE and default disable LPAE
for STM32MP15 with pager. This setup optimizes pager resident memory
by about 4kB (1 physical page) in current platform default configuration.
Acked-by: Gatien Chevallier <gatien.chevallier@foss.st.com>
Signed-off-by: Etienne Carriere <etienne.carriere@linaro.org>
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| H A D | conf.mk | dd884cc27faa922a35501c4f1f98d5ab0b217a4a Mon Mar 06 13:54:53 UTC 2023 Etienne Carriere <etienne.carriere@linaro.org> plat-stm32mp1: conf: support 32bit MMU
Updates CFG_TEE_RAM_VA_SIZE default value and MAX_XLAT_TABLES when
32bit-MMU mapping is used instead of LPAE and default disable LPAE
for STM32MP15 with pager. This setup optimizes pager resident memory
by about 4kB (1 physical page) in current platform default configuration.
Acked-by: Gatien Chevallier <gatien.chevallier@foss.st.com>
Signed-off-by: Etienne Carriere <etienne.carriere@linaro.org>
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