Searched hist:"9 ce82519c65f0dd93d2673ebb967d02f52b19a04" (Results 1 – 2 of 2) sorted by relevance
| /rk3399_ARM-atf/plat/intel/soc/common/include/ |
| H A D | socfpga_f2sdram_manager.h | 9ce82519c65f0dd93d2673ebb967d02f52b19a04 Mon Mar 13 01:32:40 UTC 2023 Ang Tien Sung <tien.sung.ang@intel.com> feat(intel): fix bridge disable and reset
Fix bridge sideband manager register clear and set incorrect
implementation. To support non-graceful full bridge disable
and enable.
Signed-off-by: Ang Tien Sung <tien.sung.ang@intel.com>
Signed-off-by: Jit Loon Lim <jit.loon.lim@intel.com>
Change-Id: I651f3ec163d954e8efb0542ec33bce96e51992db
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| /rk3399_ARM-atf/plat/intel/soc/common/soc/ |
| H A D | socfpga_reset_manager.c | 9ce82519c65f0dd93d2673ebb967d02f52b19a04 Mon Mar 13 01:32:40 UTC 2023 Ang Tien Sung <tien.sung.ang@intel.com> feat(intel): fix bridge disable and reset
Fix bridge sideband manager register clear and set incorrect
implementation. To support non-graceful full bridge disable
and enable.
Signed-off-by: Ang Tien Sung <tien.sung.ang@intel.com>
Signed-off-by: Jit Loon Lim <jit.loon.lim@intel.com>
Change-Id: I651f3ec163d954e8efb0542ec33bce96e51992db
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