Searched hist:"7385213 e602465d27530015a9b28ebc36a77b1c1" (Results 1 – 4 of 4) sorted by relevance
| /rk3399_ARM-atf/include/lib/cpus/aarch64/ |
| H A D | cortex_a720.h | 7385213e602465d27530015a9b28ebc36a77b1c1 Tue Mar 12 15:29:16 UTC 2024 Bipin Ravi <biprav01@u203721.austin.arm.com> fix(cpus): workaround for Cortex-A720 erratum 2940794
Cortex-A720 erratum 2940794 is a Cat B erratum that is present
in revision r0p0, r0p1 and is fixed in r0p2.
The workaround is to set bit[37] of the CPUACTLR2_EL1 to 1.
SDEN documentation:
https://developer.arm.com/documentation/SDEN2439421/latest
Change-Id: I1488802e0ec7c16349c9633bb45de4d0e1faa9ad
Signed-off-by: Bipin Ravi <biprav01@u203721.austin.arm.com>
|
| /rk3399_ARM-atf/lib/cpus/aarch64/ |
| H A D | cortex_a720.S | 7385213e602465d27530015a9b28ebc36a77b1c1 Tue Mar 12 15:29:16 UTC 2024 Bipin Ravi <biprav01@u203721.austin.arm.com> fix(cpus): workaround for Cortex-A720 erratum 2940794
Cortex-A720 erratum 2940794 is a Cat B erratum that is present
in revision r0p0, r0p1 and is fixed in r0p2.
The workaround is to set bit[37] of the CPUACTLR2_EL1 to 1.
SDEN documentation:
https://developer.arm.com/documentation/SDEN2439421/latest
Change-Id: I1488802e0ec7c16349c9633bb45de4d0e1faa9ad
Signed-off-by: Bipin Ravi <biprav01@u203721.austin.arm.com>
|
| /rk3399_ARM-atf/docs/design/ |
| H A D | cpu-specific-build-macros.rst | 7385213e602465d27530015a9b28ebc36a77b1c1 Tue Mar 12 15:29:16 UTC 2024 Bipin Ravi <biprav01@u203721.austin.arm.com> fix(cpus): workaround for Cortex-A720 erratum 2940794
Cortex-A720 erratum 2940794 is a Cat B erratum that is present
in revision r0p0, r0p1 and is fixed in r0p2.
The workaround is to set bit[37] of the CPUACTLR2_EL1 to 1.
SDEN documentation:
https://developer.arm.com/documentation/SDEN2439421/latest
Change-Id: I1488802e0ec7c16349c9633bb45de4d0e1faa9ad
Signed-off-by: Bipin Ravi <biprav01@u203721.austin.arm.com>
|
| /rk3399_ARM-atf/lib/cpus/ |
| H A D | cpu-ops.mk | 7385213e602465d27530015a9b28ebc36a77b1c1 Tue Mar 12 15:29:16 UTC 2024 Bipin Ravi <biprav01@u203721.austin.arm.com> fix(cpus): workaround for Cortex-A720 erratum 2940794
Cortex-A720 erratum 2940794 is a Cat B erratum that is present
in revision r0p0, r0p1 and is fixed in r0p2.
The workaround is to set bit[37] of the CPUACTLR2_EL1 to 1.
SDEN documentation:
https://developer.arm.com/documentation/SDEN2439421/latest
Change-Id: I1488802e0ec7c16349c9633bb45de4d0e1faa9ad
Signed-off-by: Bipin Ravi <biprav01@u203721.austin.arm.com>
|