Searched hist:"6799 a370e2b9e61b997410044044a8d3fb308806" (Results 1 – 2 of 2) sorted by relevance
| /rk3399_ARM-atf/plat/arm/board/n1sdp/ |
| H A D | platform.mk | 6799a370e2b9e61b997410044044a8d3fb308806 Mon Oct 14 16:37:38 UTC 2019 Manish Pandey <manish.pandey2@arm.com> n1sdp: setup multichip gic routing table
N1SDP supports multichip configuration wherein n1sdp boards are
connected over high speed coherent CCIX link, for now only dual-chip
is supported.
Whether or not multiple chips are present is dynamically probed by
SCP firmware and passed on to TF-A, routing table will be set up
only if multiple chips are present.
Initialize GIC-600 multichip operation by overriding the default GICR
frames with array of GICR frames and setting the chip 0 as routing
table owner.
Change-Id: Ida35672be4bbf4c517469a5b330548d75e593ff2
Signed-off-by: Manish Pandey <manish.pandey2@arm.com>
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| H A D | n1sdp_bl31_setup.c | 6799a370e2b9e61b997410044044a8d3fb308806 Mon Oct 14 16:37:38 UTC 2019 Manish Pandey <manish.pandey2@arm.com> n1sdp: setup multichip gic routing table
N1SDP supports multichip configuration wherein n1sdp boards are
connected over high speed coherent CCIX link, for now only dual-chip
is supported.
Whether or not multiple chips are present is dynamically probed by
SCP firmware and passed on to TF-A, routing table will be set up
only if multiple chips are present.
Initialize GIC-600 multichip operation by overriding the default GICR
frames with array of GICR frames and setting the chip 0 as routing
table owner.
Change-Id: Ida35672be4bbf4c517469a5b330548d75e593ff2
Signed-off-by: Manish Pandey <manish.pandey2@arm.com>
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