Searched hist:"61491 a0c36bfe1ee0d07f9c9f66784dd026ef215" (Results 1 – 4 of 4) sorted by relevance
| /optee_os/core/arch/arm/plat-stm32mp1/drivers/ |
| H A D | stm32mp1_syscfg.c | 61491a0c36bfe1ee0d07f9c9f66784dd026ef215 Thu Nov 21 09:03:15 UTC 2024 Pascal Paillet <p.paillet@foss.st.com> plat-stm32mp1: retrieve chip id from syscfg
Chip ID is read from SYSCFG. Add the associated read
function and new CHIP IDs.
Use the chip id to dynamically detect the CRYPTO hardware
support, the second CPU core, and CPU OPP.
Signed-off-by: Lionel Debieve <lionel.debieve@st.com>
Signed-off-by: Pascal Paillet <p.paillet@foss.st.com>
Reviewed-by: Etienne Carriere <etienne.carriere@foss.st.com>
|
| /optee_os/core/arch/arm/plat-stm32mp1/ |
| H A D | platform_config.h | 61491a0c36bfe1ee0d07f9c9f66784dd026ef215 Thu Nov 21 09:03:15 UTC 2024 Pascal Paillet <p.paillet@foss.st.com> plat-stm32mp1: retrieve chip id from syscfg
Chip ID is read from SYSCFG. Add the associated read
function and new CHIP IDs.
Use the chip id to dynamically detect the CRYPTO hardware
support, the second CPU core, and CPU OPP.
Signed-off-by: Lionel Debieve <lionel.debieve@st.com>
Signed-off-by: Pascal Paillet <p.paillet@foss.st.com>
Reviewed-by: Etienne Carriere <etienne.carriere@foss.st.com>
|
| H A D | stm32_util.h | 61491a0c36bfe1ee0d07f9c9f66784dd026ef215 Thu Nov 21 09:03:15 UTC 2024 Pascal Paillet <p.paillet@foss.st.com> plat-stm32mp1: retrieve chip id from syscfg
Chip ID is read from SYSCFG. Add the associated read
function and new CHIP IDs.
Use the chip id to dynamically detect the CRYPTO hardware
support, the second CPU core, and CPU OPP.
Signed-off-by: Lionel Debieve <lionel.debieve@st.com>
Signed-off-by: Pascal Paillet <p.paillet@foss.st.com>
Reviewed-by: Etienne Carriere <etienne.carriere@foss.st.com>
|
| H A D | main.c | 61491a0c36bfe1ee0d07f9c9f66784dd026ef215 Thu Nov 21 09:03:15 UTC 2024 Pascal Paillet <p.paillet@foss.st.com> plat-stm32mp1: retrieve chip id from syscfg
Chip ID is read from SYSCFG. Add the associated read
function and new CHIP IDs.
Use the chip id to dynamically detect the CRYPTO hardware
support, the second CPU core, and CPU OPP.
Signed-off-by: Lionel Debieve <lionel.debieve@st.com>
Signed-off-by: Pascal Paillet <p.paillet@foss.st.com>
Reviewed-by: Etienne Carriere <etienne.carriere@foss.st.com>
|